Changeset 53a49cc
- Timestamp:
- Feb 6, 2020, 10:28:23 AM (5 years ago)
- Branches:
- ADT, arm-eh, ast-experimental, enum, forall-pointer-decay, jacob/cs343-translation, jenkins-sandbox, master, new-ast, new-ast-unique-expr, pthread-emulation, qualifiedEnum
- Children:
- 80dbf6a
- Parents:
- a573c22
- Location:
- doc/papers/concurrency/figures
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
doc/papers/concurrency/figures/FullCoroutinePhases.fig
ra573c22 r53a49cc 8 8 -2 9 9 1200 2 10 5 1 0 1 0 7 100 0 -1 0.000 0 0 1 0 4575.000 2437.500 4275 1875 4575 1800 4875 187510 5 1 0 1 0 7 100 0 -1 0.000 0 0 1 0 5175.000 2437.500 4875 1875 5175 1800 5475 1875 11 11 1 1 1.00 45.00 90.00 12 5 1 0 1 0 7 100 0 -1 0.000 0 0 1 0 4575.000 1537.500 4875 2100 4575 2175 4275 210012 5 1 0 1 0 7 100 0 -1 0.000 0 0 1 0 5175.000 1537.500 5475 2100 5175 2175 4875 2100 13 13 1 1 1.00 45.00 90.00 14 5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 4 207.500 1642.500 4125 1425 3975 1650 4200 187514 5 1 0 1 0 7 50 -1 -1 0.000 0 1 1 0 4807.500 1642.500 4725 1425 4575 1650 4800 1875 15 15 1 1 1.00 45.00 90.00 16 6 1575 1575 2700 2025 16 17 2 1 0 1 0 7 100 0 -1 0.000 0 0 -1 1 0 2 17 18 1 1 1.00 45.00 90.00 … … 20 21 1 1 1.00 45.00 90.00 21 22 2175 1575 2400 1800 23 4 1 0 100 0 4 10 0.0000 2 165 300 1725 1950 ping\001 24 4 1 0 100 0 4 10 0.0000 2 135 360 2475 1950 pong\001 25 -6 26 6 3075 1575 4200 2025 27 6 3075 1575 4200 2025 22 28 2 1 0 1 0 7 100 0 -1 0.000 0 0 -1 1 0 2 23 29 1 1 1.00 45.00 90.00 24 3 3001575 3300 180030 3525 1575 3300 1800 25 31 2 1 0 1 0 7 100 0 -1 0.000 0 0 -1 1 0 2 26 32 1 1 1.00 45.00 90.00 27 3300 2025 3300 2250 28 4 1 0 100 0 0 10 0.0000 2 105 555 2100 1200 creation\001 29 4 1 0 100 0 4 10 0.0000 2 165 300 1725 1950 ping\001 30 4 1 0 100 0 4 10 0.0000 2 135 360 2475 1950 pong\001 31 4 1 0 100 0 4 10 0.0000 2 165 300 3300 1950 ping\001 32 4 1 0 100 0 4 10 0.0000 2 135 360 3300 2400 pong\001 33 4 1 0 100 0 0 10 0.0000 2 105 675 4575 1200 execution\001 34 4 1 0 100 0 4 10 0.0000 2 165 300 4275 2025 ping\001 35 4 1 0 100 0 4 10 0.0000 2 135 360 4875 2025 pong\001 36 4 1 0 100 0 0 10 0.0000 2 90 420 3300 1200 starter\001 33 3675 1575 3900 1800 34 4 1 0 100 0 4 10 0.0000 2 165 300 3225 1950 ping\001 35 4 1 0 100 0 4 10 0.0000 2 135 360 3975 1950 pong\001 36 -6 37 -6 37 38 4 1 0 100 0 4 10 0.0000 2 165 705 2100 1500 pgm main\001 38 4 1 0 100 0 4 10 0.0000 2 165 705 3300 1500 pgm main\001 39 4 1 0 100 0 4 10 0.0000 2 165 705 4500 1500 pgm main\001 39 4 1 0 100 0 4 10 0.0000 2 165 705 3600 1500 pgm main\001 40 4 1 0 100 0 4 10 0.0000 2 165 300 4875 2025 ping\001 41 4 1 0 100 0 4 10 0.0000 2 135 360 5475 2025 pong\001 42 4 1 0 100 0 4 10 0.0000 2 165 705 5100 1500 pgm main\001 43 4 1 0 100 0 2 10 0.0000 2 105 540 2100 1275 creator\001 44 4 1 0 100 0 2 10 0.0000 2 105 495 3600 1275 starter\001 45 4 1 0 100 0 2 10 0.0000 2 105 690 5175 1275 execution\001 -
doc/papers/concurrency/figures/RunTimeStructure.fig
ra573c22 r53a49cc 36 36 1 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 4500 3600 15 15 4500 3600 4515 3615 37 37 -6 38 6 2175 4650 7050 4950 39 1 3 0 1 0 0 0 0 0 0.000 1 0.0000 2250 4830 30 30 2250 4830 2280 4860 40 1 1 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4200 4800 150 75 4200 4800 4350 4875 41 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3275 4800 100 100 3275 4800 3375 4800 38 6 3225 4125 4650 4425 39 6 4350 4200 4650 4350 40 1 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 4425 4275 15 15 4425 4275 4440 4290 41 1 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 4500 4275 15 15 4500 4275 4515 4290 42 1 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 4575 4275 15 15 4575 4275 4590 4290 43 -6 44 1 1 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3450 4275 225 150 3450 4275 3675 4425 45 1 1 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4050 4275 225 150 4050 4275 4275 4425 46 -6 47 6 6675 4125 7500 4425 48 6 7200 4200 7500 4350 49 1 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 7275 4275 15 15 7275 4275 7290 4290 50 1 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 7350 4275 15 15 7350 4275 7365 4290 51 1 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 7425 4275 15 15 7425 4275 7440 4290 52 -6 53 1 1 0 1 -1 -1 0 0 -1 0.000 1 0.0000 6900 4275 225 150 6900 4275 7125 4425 54 -6 55 6 6675 3525 8025 3975 56 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2 57 1 1 1.00 45.00 90.00 58 6675 3750 6975 3750 59 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2 60 1 1 1.00 45.00 90.00 61 7125 3750 7350 3750 42 62 2 2 0 1 -1 -1 0 0 -1 0.000 0 0 0 0 0 5 43 5400 4950 5400 4725 5175 4725 5175 4950 5400 4950 44 2 2 1 1 -1 -1 0 0 -1 3.000 0 0 0 0 0 5 45 6525 4950 6300 4950 6300 4725 6525 4725 6525 4950 46 4 0 -1 0 0 0 10 0.0000 2 105 450 6600 4875 cluster\001 47 4 0 -1 0 0 0 10 0.0000 2 105 660 5475 4875 processor\001 48 4 0 -1 0 0 0 10 0.0000 2 105 555 4425 4875 monitor\001 49 4 0 -1 0 0 0 10 0.0000 2 120 270 3450 4875 task\001 50 4 0 -1 0 0 0 10 0.0000 2 105 660 2325 4875 coroutine\001 51 -6 52 6 3450 1275 3750 1425 53 1 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 3525 1350 15 15 3525 1350 3540 1365 54 1 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 3600 1350 15 15 3600 1350 3615 1365 55 1 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 3675 1350 15 15 3675 1350 3690 1365 56 -6 57 6 5550 1275 5850 1425 58 1 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 5625 1350 15 15 5625 1350 5640 1365 59 1 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 5700 1350 15 15 5700 1350 5715 1365 60 1 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 5775 1350 15 15 5775 1350 5790 1365 63 7800 3975 7800 3525 7350 3525 7350 3975 7800 3975 64 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2 65 1 1 1.00 45.00 90.00 66 7800 3750 8025 3750 61 67 -6 62 68 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 5550 2625 150 150 5550 2625 5700 2625 … … 67 73 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4425 2850 150 150 4425 2850 4575 2850 68 74 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4650 2475 150 150 4650 2475 4800 2475 69 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3525 3600 150 150 3525 3600 3675 360070 75 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3975 3600 150 150 3975 3600 4125 3600 71 76 1 3 0 1 0 0 0 0 0 0.000 1 0.0000 3525 3600 30 30 3525 3600 3555 3630 … … 74 79 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3975 2850 150 150 3975 2850 4125 2850 75 80 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 7200 2775 150 150 7200 2775 7350 2775 76 1 1 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4650 1350 225 150 4650 1350 4875 1500 77 1 1 0 1 -1 -1 0 0 -1 0.000 1 0.0000 5250 1350 225 150 5250 1350 5475 1500 78 1 1 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4050 1350 225 150 4050 1350 4275 1500 81 1 3 0 1 0 0 0 0 0 0.000 1 0.0000 2250 4830 30 30 2250 4830 2280 4860 82 1 3 0 1 0 0 0 0 0 0.000 1 0.0000 7200 2775 30 30 7200 2775 7230 2805 83 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3525 3600 150 150 3525 3600 3675 3600 84 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3875 4800 100 100 3875 4800 3975 4800 85 1 1 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4650 4800 150 75 4650 4800 4800 4875 79 86 2 2 0 1 -1 -1 0 0 -1 0.000 0 0 0 0 0 5 80 87 2400 4200 2400 3750 1950 3750 1950 4200 2400 4200 … … 140 147 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2 141 148 1 1 1.00 45.00 90.00 142 6675 3975 6975 3975143 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2144 1 1 1.00 45.00 90.00145 149 7050 2775 6825 2775 146 150 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2 147 6825 2775 6825 3975 148 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2 149 1 1 1.00 45.00 90.00 150 7125 3975 7350 3975 151 2 2 0 1 -1 -1 0 0 -1 0.000 0 0 0 0 0 5 152 7800 4200 7800 3750 7350 3750 7350 4200 7800 4200 153 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2 154 1 1 1.00 45.00 90.00 155 7800 3975 8025 3975 151 6825 2775 6825 3750 156 152 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 4 157 153 1 1 1.00 45.00 90.00 158 7875 3975 7875 2325 7200 2325 7200 2550 154 7875 3750 7875 2325 7200 2325 7200 2550 155 2 2 0 1 -1 -1 0 0 -1 0.000 0 0 0 0 0 5 156 5850 4950 5850 4725 5625 4725 5625 4950 5850 4950 157 2 2 1 1 -1 -1 0 0 -1 3.000 0 0 0 0 0 5 158 6975 4950 6750 4950 6750 4725 6975 4725 6975 4950 159 159 4 1 -1 0 0 0 10 0.0000 2 105 720 5550 4425 Processors\001 160 160 4 1 -1 0 0 0 10 0.0000 2 120 1005 4200 3225 Blocked Tasks\001 … … 165 165 4 1 -1 0 0 0 10 0.0000 2 105 990 2175 3525 Discrete-event\001 166 166 4 1 -1 0 0 0 10 0.0000 2 135 795 2175 4350 preemption\001 167 4 0 -1 0 0 0 10 0.0000 2 150 1290 2325 4875 genrator/coroutine\001 168 4 0 -1 0 0 0 10 0.0000 2 120 270 4050 4875 task\001 169 4 0 -1 0 0 0 10 0.0000 2 105 450 7050 4875 cluster\001 170 4 0 -1 0 0 0 10 0.0000 2 105 660 5925 4875 processor\001 171 4 0 -1 0 0 0 10 0.0000 2 105 555 4875 4875 monitor\001
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