source: libcfa/src/concurrency/preemption.cfa@ 080b0a1

ADT arm-eh ast-experimental enum forall-pointer-decay jacob/cs343-translation new-ast-unique-expr pthread-emulation qualifiedEnum
Last change on this file since 080b0a1 was 82a2fed, checked in by Thierry Delisle <tdelisle@…>, 5 years ago

Changed preemption to use code sections rather than atomic access to TLS.

  • Property mode set to 100644
File size: 25.0 KB
RevLine 
[c81ebf9]1//
2// Cforall Version 1.0.0 Copyright (C) 2016 University of Waterloo
3//
4// The contents of this file are covered under the licence agreement in the
5// file "LICENCE" distributed with Cforall.
6//
7// signal.c --
8//
9// Author : Thierry Delisle
10// Created On : Mon Jun 5 14:20:42 2017
[6b0b624]11// Last Modified By : Peter A. Buhr
[231b18f]12// Last Modified On : Fri Nov 6 07:42:13 2020
13// Update Count : 54
[c81ebf9]14//
15
[2026bb6]16#define __cforall_thread__
17
[73abe95]18#include "preemption.hfa"
[a83ffa4]19#include <assert.h>
[c81ebf9]20
[82ff5845]21#include <errno.h>
22#include <stdio.h>
23#include <string.h>
24#include <unistd.h>
[27f5f71]25#include <limits.h> // PTHREAD_STACK_MIN
[c81ebf9]26
[73abe95]27#include "bits/signal.hfa"
[e660761]28#include "kernel_private.hfa"
[82ff5845]29
[d8548e2]30#if !defined(__CFA_DEFAULT_PREEMPTION__)
[2a84d06d]31#define __CFA_DEFAULT_PREEMPTION__ 10`ms
[d8548e2]32#endif
[c81ebf9]33
[2a84d06d]34Duration default_preemption() __attribute__((weak)) {
[c81ebf9]35 return __CFA_DEFAULT_PREEMPTION__;
36}
37
[969b3fe]38// FwdDeclarations : timeout handlers
[c81ebf9]39static void preempt( processor * this );
[e873838]40static void timeout( $thread * this );
[c81ebf9]41
[969b3fe]42// FwdDeclarations : Signal handlers
[c29c342]43static void sigHandler_ctxSwitch( __CFA_SIGPARMS__ );
[c59a346]44static void sigHandler_alarm ( __CFA_SIGPARMS__ );
[c29c342]45static void sigHandler_segv ( __CFA_SIGPARMS__ );
46static void sigHandler_ill ( __CFA_SIGPARMS__ );
47static void sigHandler_fpe ( __CFA_SIGPARMS__ );
48static void sigHandler_abort ( __CFA_SIGPARMS__ );
[82ff5845]49
[969b3fe]50// FwdDeclarations : alarm thread main
[c29c342]51static void * alarm_loop( __attribute__((unused)) void * args );
[969b3fe]52
53// Machine specific register name
[381fdee]54#if defined( __i386 )
[b2b44d8]55#define CFA_REG_IP gregs[REG_EIP]
[381fdee]56#elif defined( __x86_64 )
57#define CFA_REG_IP gregs[REG_RIP]
[e9b49379]58#elif defined( __arm__ )
59#define CFA_REG_IP arm_pc
60#elif defined( __aarch64__ )
[482fa08]61#define CFA_REG_IP pc
[381fdee]62#else
[e9b49379]63#error unsupported hardware architecture
[cd17862]64#endif
65
[969b3fe]66KERNEL_STORAGE(event_kernel_t, event_kernel); // private storage for event kernel
67event_kernel_t * event_kernel; // kernel public handle to even kernel
68static pthread_t alarm_thread; // pthread handle to alarm thread
[09d4b22]69static void * alarm_stack; // pthread stack for alarm thread
[969b3fe]70
[c29c342]71static void ?{}(event_kernel_t & this) with( this ) {
[65deb18]72 alarms{};
73 lock{};
[969b3fe]74}
[82ff5845]75
[4dad189]76enum {
77 PREEMPT_NORMAL = 0,
78 PREEMPT_TERMINATE = 1,
79};
80
[c81ebf9]81//=============================================================================================
82// Kernel Preemption logic
83//=============================================================================================
84
[969b3fe]85// Get next expired node
[2a84d06d]86static inline alarm_node_t * get_expired( alarm_list_t * alarms, Time currtime ) {
[d3ab183]87 if( ! & (*alarms)`first ) return 0p; // If no alarms return null
88 if( (*alarms)`first.alarm >= currtime ) return 0p; // If alarms head not expired return null
[27f5f71]89 return pop(alarms); // Otherwise just pop head
[969b3fe]90}
91
92// Tick one frame of the Discrete Event Simulation for alarms
[e873838]93static void tick_preemption(void) {
[27f5f71]94 alarm_node_t * node = 0p; // Used in the while loop but cannot be declared in the while condition
95 alarm_list_t * alarms = &event_kernel->alarms; // Local copy for ease of reading
96 Time currtime = __kernel_get_time(); // Check current time once so everything "happens at once"
[8cb529e]97
[969b3fe]98 //Loop throught every thing expired
99 while( node = get_expired( alarms, currtime ) ) {
[b1a4300]100 // __cfaabi_dbg_print_buffer_decl( " KERNEL: preemption tick.\n" );
[185efe6]101 Duration period = node->period;
102 if( period == 0) {
103 node->set = false; // Node is one-shot, just mark it as not pending
104 }
[1c273d0]105
[969b3fe]106 // Check if this is a kernel
[4b30e8cc]107 if( node->type == Kernel ) {
[c81ebf9]108 preempt( node->proc );
109 }
[4b30e8cc]110 else if( node->type == User ) {
[e873838]111 timeout( node->thrd );
[c81ebf9]112 }
[4b30e8cc]113 else {
[eeb5023]114 node->callback(*node);
[4b30e8cc]115 }
[c81ebf9]116
[969b3fe]117 // Check if this is a periodic alarm
[8cb529e]118 if( period > 0 ) {
[b1a4300]119 // __cfaabi_dbg_print_buffer_local( " KERNEL: alarm period is %lu.\n", period.tv );
[969b3fe]120 node->alarm = currtime + period; // Alarm is periodic, add currtime to it (used cached current time)
121 insert( alarms, node ); // Reinsert the node for the next time it triggers
[c81ebf9]122 }
123 }
124
[969b3fe]125 // If there are still alarms pending, reset the timer
[d3ab183]126 if( & (*alarms)`first ) {
[6a490b2]127 __cfadbg_print_buffer_decl(preemption, " KERNEL: @%ju(%ju) resetting alarm to %ju.\n", currtime.tv, __kernel_get_time().tv, (alarms->head->alarm - currtime).tv);
[d3ab183]128 Duration delta = (*alarms)`first.alarm - currtime;
129 Duration capped = max(delta, 50`us);
[b1a4300]130 // itimerval tim = { caped };
131 // __cfaabi_dbg_print_buffer_local( " Values are %lu, %lu, %lu %lu.\n", delta.tv, caped.tv, tim.it_value.tv_sec, tim.it_value.tv_usec);
132
[d3ab183]133 __kernel_set_timer( capped );
[b1a4300]134 }
[c81ebf9]135}
136
[969b3fe]137// Update the preemption of a processor and notify interested parties
[2a84d06d]138void update_preemption( processor * this, Duration duration ) {
[c81ebf9]139 alarm_node_t * alarm = this->preemption_alarm;
140
141 // Alarms need to be enabled
[2a84d06d]142 if ( duration > 0 && ! alarm->set ) {
[c81ebf9]143 alarm->alarm = __kernel_get_time() + duration;
144 alarm->period = duration;
145 register_self( alarm );
146 }
[8ad6533]147 // Zero duration but alarm is set
[c81ebf9]148 else if ( duration == 0 && alarm->set ) {
149 unregister_self( alarm );
150 alarm->alarm = 0;
151 alarm->period = 0;
152 }
153 // If alarm is different from previous, change it
154 else if ( duration > 0 && alarm->period != duration ) {
155 unregister_self( alarm );
156 alarm->alarm = __kernel_get_time() + duration;
157 alarm->period = duration;
158 register_self( alarm );
159 }
160}
161
162//=============================================================================================
[cd17862]163// Kernel Signal Tools
[c81ebf9]164//=============================================================================================
[231b18f]165// In a user-level threading system, there are handful of thread-local variables where this problem occurs on the ARM.
[54dcab1]166//
[231b18f]167// For each kernel thread running user-level threads, there is a flag variable to indicate if interrupts are
168// enabled/disabled for that kernel thread. Therefore, this variable is made thread local.
[54dcab1]169//
[231b18f]170// For example, this code fragment sets the state of the "interrupt" variable in thread-local memory.
[54dcab1]171//
[231b18f]172// _Thread_local volatile int interrupts;
173// int main() {
174// interrupts = 0; // disable interrupts }
[54dcab1]175//
[231b18f]176// which generates the following code on the ARM
[54dcab1]177//
[231b18f]178// (gdb) disassemble main
179// Dump of assembler code for function main:
180// 0x0000000000000610 <+0>: mrs x1, tpidr_el0
181// 0x0000000000000614 <+4>: mov w0, #0x0 // #0
182// 0x0000000000000618 <+8>: add x1, x1, #0x0, lsl #12
183// 0x000000000000061c <+12>: add x1, x1, #0x10
184// 0x0000000000000620 <+16>: str wzr, [x1]
185// 0x0000000000000624 <+20>: ret
[54dcab1]186//
[231b18f]187// The mrs moves a pointer from coprocessor register tpidr_el0 into register x1. Register w0 is set to 0. The two adds
188// increase the TLS pointer with the displacement (offset) 0x10, which is the location in the TSL of variable
189// "interrupts". Finally, 0 is stored into "interrupts" through the pointer in register x1 that points into the
190// TSL. Now once x1 has the pointer to the location of the TSL for kernel thread N, it can be be preempted at a
191// user-level and the user thread is put on the user-level ready-queue. When the preempted thread gets to the front of
192// the user-level ready-queue it is run on kernel thread M. It now stores 0 into "interrupts" back on kernel thread N,
193// turning off interrupt on the wrong kernel thread.
[54dcab1]194//
[231b18f]195// On the x86, the following code is generated for the same code fragment.
[54dcab1]196//
[231b18f]197// (gdb) disassemble main
198// Dump of assembler code for function main:
199// 0x0000000000400420 <+0>: movl $0x0,%fs:0xfffffffffffffffc
200// 0x000000000040042c <+12>: xor %eax,%eax
[54dcab1]201// 0x000000000040042e <+14>: retq
202//
[231b18f]203// and there is base-displacement addressing used to atomically reset variable "interrupts" off of the TSL pointer in
204// register "fs".
[54dcab1]205//
[231b18f]206// Hence, the ARM has base-displacement address for the general purpose registers, BUT not to the coprocessor
207// registers. As a result, generating the address for the write into variable "interrupts" is no longer atomic.
[54dcab1]208//
[231b18f]209// Note this problem does NOT occur when just using multiple kernel threads because the preemption ALWAYS restarts the
210// thread on the same kernel thread.
[54dcab1]211//
[231b18f]212// The obvious question is why does ARM use a coprocessor register to store the TSL pointer given that coprocessor
213// registers are second-class registers with respect to the instruction set. One possible answer is that they did not
214// want to dedicate one of the general registers to hold the TLS pointer and there was a free coprocessor register
215// available.
[c81ebf9]216
[8fc652e0]217//----------
218// special case for preemption since used often
219bool __preemption_enabled() {
220 // create a assembler label before
221 // marked as clobber all to avoid movement
222 asm volatile("__cfaasm_check_before:":::"memory");
223
224 // access tls as normal
225 bool enabled = __cfaabi_tls.preemption_state.enabled;
226
227 // create a assembler label after
228 // marked as clobber all to avoid movement
229 asm volatile("__cfaasm_check_after:":::"memory");
230 return enabled;
231}
232
[82a2fed]233struct asm_region {
234 void * before;
235 void * after;
236};
237
238static inline bool __cfaasm_in( void * ip, struct asm_region & region ) {
239 return ip >= region.before && ip <= region.after;
240}
241
242
[8fc652e0]243//----------
244// Get data from the TLS block
[82a2fed]245// struct asm_region __cfaasm_get;
[8fc652e0]246uintptr_t __cfatls_get( unsigned long int offset ) __attribute__((__noinline__)); //no inline to avoid problems
247uintptr_t __cfatls_get( unsigned long int offset ) {
[82a2fed]248 // __cfaasm_get.before = ({ void * value; asm("movq $__cfaasm_get_before, %[v]\n\t" : [v]"=r"(value) ); value; });
249 // __cfaasm_get.after = ({ void * value; asm("movq $__cfaasm_get_after , %[v]\n\t" : [v]"=r"(value) ); value; });
[8fc652e0]250 // create a assembler label before
251 // marked as clobber all to avoid movement
252 asm volatile("__cfaasm_get_before:":::"memory");
253
254 // access tls as normal (except for pointer arithmetic)
255 uintptr_t val = *(uintptr_t*)((uintptr_t)&__cfaabi_tls + offset);
256
257 // create a assembler label after
258 // marked as clobber all to avoid movement
259 asm volatile("__cfaasm_get_after:":::"memory");
260 return val;
261}
262
[82ff5845]263extern "C" {
[969b3fe]264 // Disable interrupts by incrementing the counter
[82ff5845]265 void disable_interrupts() {
[8fc652e0]266 // create a assembler label before
267 // marked as clobber all to avoid movement
[82a2fed]268 asm volatile("__cfaasm_dsable_before:":::"memory");
[8fc652e0]269
270 with( __cfaabi_tls.preemption_state ) {
[1f81d61]271 #if GCC_VERSION > 50000
[13073be]272 static_assert(__atomic_always_lock_free(sizeof(enabled), &enabled), "Must be lock-free");
[1f81d61]273 #endif
[13073be]274
275 // Set enabled flag to false
276 // should be atomic to avoid preemption in the middle of the operation.
277 // use memory order RELAXED since there is no inter-thread on this variable requirements
278 __atomic_store_n(&enabled, false, __ATOMIC_RELAXED);
279
280 // Signal the compiler that a fence is needed but only for signal handlers
281 __atomic_signal_fence(__ATOMIC_ACQUIRE);
282
[de6319f]283 __attribute__((unused)) unsigned short new_val = disable_count + 1;
284 disable_count = new_val;
285 verify( new_val < 65_000u ); // If this triggers someone is disabling interrupts without enabling them
286 }
[8fc652e0]287
288 // create a assembler label after
289 // marked as clobber all to avoid movement
[82a2fed]290 asm volatile("__cfaasm_dsable_after:":::"memory");
[82ff5845]291 }
292
[969b3fe]293 // Enable interrupts by decrementing the counter
[c7a900a]294 // If counter reaches 0, execute any pending __cfactx_switch
[36982fc]295 void enable_interrupts( __cfaabi_dbg_ctx_param ) {
[8fc652e0]296 // create a assembler label before
297 // marked as clobber all to avoid movement
[82a2fed]298 asm volatile("__cfaasm_enble_before:":::"memory");
[8fc652e0]299
300 processor * proc = __cfaabi_tls.this_processor; // Cache the processor now since interrupts can start happening after the atomic store
[8e9e9a2]301 /* paranoid */ verify( proc );
[969b3fe]302
[8fc652e0]303 with( __cfaabi_tls.preemption_state ){
[de6319f]304 unsigned short prev = disable_count;
305 disable_count -= 1;
306 verify( prev != 0u ); // If this triggers someone is enabled already enabled interruptsverify( prev != 0u );
307
308 // Check if we need to prempt the thread because an interrupt was missed
309 if( prev == 1 ) {
[1f81d61]310 #if GCC_VERSION > 50000
[13073be]311 static_assert(__atomic_always_lock_free(sizeof(enabled), &enabled), "Must be lock-free");
[1f81d61]312 #endif
[13073be]313
314 // Set enabled flag to true
315 // should be atomic to avoid preemption in the middle of the operation.
316 // use memory order RELAXED since there is no inter-thread on this variable requirements
317 __atomic_store_n(&enabled, true, __ATOMIC_RELAXED);
318
319 // Signal the compiler that a fence is needed but only for signal handlers
320 __atomic_signal_fence(__ATOMIC_RELEASE);
[de6319f]321 if( proc->pending_preemption ) {
322 proc->pending_preemption = false;
[3381ed7]323 force_yield( __POLL_PREEMPTION );
[de6319f]324 }
[d0a045c7]325 }
[82ff5845]326 }
[4e6fb8e]327
[969b3fe]328 // For debugging purposes : keep track of the last person to enable the interrupts
[36982fc]329 __cfaabi_dbg_debug_do( proc->last_enable = caller; )
[8fc652e0]330
331 // create a assembler label after
332 // marked as clobber all to avoid movement
[82a2fed]333 asm volatile("__cfaasm_enble_after:":::"memory");
[82ff5845]334 }
[969b3fe]335
336 // Disable interrupts by incrementint the counter
[c7a900a]337 // Don't execute any pending __cfactx_switch even if counter reaches 0
[969b3fe]338 void enable_interrupts_noPoll() {
[8fc652e0]339 // create a assembler label before
340 // marked as clobber all to avoid movement
341 asm volatile("__cfaasm_nopoll_before:":::"memory");
342
343 unsigned short prev = __cfaabi_tls.preemption_state.disable_count;
344 __cfaabi_tls.preemption_state.disable_count -= 1;
[2e9aed4]345 verifyf( prev != 0u, "Incremented from %u\n", prev ); // If this triggers someone is enabled already enabled interrupts
[d0a045c7]346 if( prev == 1 ) {
[1f81d61]347 #if GCC_VERSION > 50000
[8fc652e0]348 static_assert(__atomic_always_lock_free(sizeof(__cfaabi_tls.preemption_state.enabled), &__cfaabi_tls.preemption_state.enabled), "Must be lock-free");
[1f81d61]349 #endif
[13073be]350 // Set enabled flag to true
351 // should be atomic to avoid preemption in the middle of the operation.
352 // use memory order RELAXED since there is no inter-thread on this variable requirements
[8fc652e0]353 __atomic_store_n(&__cfaabi_tls.preemption_state.enabled, true, __ATOMIC_RELAXED);
[13073be]354
355 // Signal the compiler that a fence is needed but only for signal handlers
356 __atomic_signal_fence(__ATOMIC_RELEASE);
[d0a045c7]357 }
[8fc652e0]358
359 // create a assembler label after
360 // marked as clobber all to avoid movement
361 asm volatile("__cfaasm_nopoll_after:":::"memory");
[969b3fe]362 }
[82ff5845]363}
364
[969b3fe]365// sigprocmask wrapper : unblock a single signal
[1c273d0]366static inline void signal_unblock( int sig ) {
[82ff5845]367 sigset_t mask;
368 sigemptyset( &mask );
[1c273d0]369 sigaddset( &mask, sig );
[82ff5845]370
[27f5f71]371 if ( pthread_sigmask( SIG_UNBLOCK, &mask, 0p ) == -1 ) {
[169d944]372 abort( "internal error, pthread_sigmask" );
[cd17862]373 }
[82ff5845]374}
375
[969b3fe]376// sigprocmask wrapper : block a single signal
[cd17862]377static inline void signal_block( int sig ) {
378 sigset_t mask;
379 sigemptyset( &mask );
380 sigaddset( &mask, sig );
[47ecf2b]381
[27f5f71]382 if ( pthread_sigmask( SIG_BLOCK, &mask, 0p ) == -1 ) {
[c59a346]383 abort( "internal error, pthread_sigmask" );
[cd17862]384 }
385}
[47ecf2b]386
[969b3fe]387// kill wrapper : signal a processor
[cd17862]388static void preempt( processor * this ) {
[4dad189]389 sigval_t value = { PREEMPT_NORMAL };
390 pthread_sigqueue( this->kernel_thread, SIGUSR1, value );
391}
392
[969b3fe]393// reserved for future use
[e873838]394static void timeout( $thread * this ) {
[8834751]395 #if !defined( __CFA_NO_STATISTICS__ )
[8fc652e0]396 kernelTLS().this_stats = this->curr_cluster->stats;
[8834751]397 #endif
[e873838]398 unpark( this );
[cd17862]399}
400
[82a2fed]401//-----------------------------------------------------------------------------
402// Some assembly required
403#if defined( __i386 )
404 #ifdef __PIC__
405 #define RELOC_PRELUDE( label ) \
406 "calll .Lcfaasm_prelude_" #label "$pb\n\t" \
407 ".Lcfaasm_prelude_" #label "$pb:\n\t" \
408 "popl %%eax\n\t" \
409 ".Lcfaasm_prelude_" #label "_end:\n\t" \
410 "addl $_GLOBAL_OFFSET_TABLE_+(.Lcfaasm_prelude_" #label "_end-.Lcfaasm_prelude_" #label "$pb), %%eax\n\t"
411 #define RELOC_PREFIX ""
412 #define RELOC_SUFFIX "@GOT(%%eax)"
413 #else
414 #define RELOC_PREFIX "$"
415 #define RELOC_SUFFIX ""
416 #endif
417 #define __cfaasm_label( label ) static struct asm_region label = \
418 ({ \
419 struct asm_region region; \
420 asm( \
421 RELOC_PRELUDE( label ) \
422 "movl " RELOC_PREFIX "__cfaasm_" #label "_before" RELOC_SUFFIX ", %[vb]\n\t" \
423 "movl " RELOC_PREFIX "__cfaasm_" #label "_after" RELOC_SUFFIX ", %[va]\n\t" \
424 : [vb]"=r"(region.before), [va]"=r"(region.after) \
425 ); \
426 region; \
427 });
428#elif defined( __x86_64 )
429 #ifdef __PIC__
430 #define RELOC_PREFIX ""
431 #define RELOC_SUFFIX "@GOTPCREL(%%rip)"
432 #else
433 #define RELOC_PREFIX "$"
434 #define RELOC_SUFFIX ""
435 #endif
436 #define __cfaasm_label( label ) static struct asm_region label = \
437 ({ \
438 struct asm_region region; \
439 asm( \
440 "movq " RELOC_PREFIX "__cfaasm_" #label "_before" RELOC_SUFFIX ", %[vb]\n\t" \
441 "movq " RELOC_PREFIX "__cfaasm_" #label "_after" RELOC_SUFFIX ", %[va]\n\t" \
442 : [vb]"=r"(region.before), [va]"=r"(region.after) \
443 ); \
444 region; \
445 });
446#elif defined( __aarch64__ )
447 #ifdef __PIC__
448 #define RELOC_TAG "@PLT"
449 #else
450 #define RELOC_TAG ""
451 #endif
452 #define __cfaasm_label( label ) \
453 ({ \
454 struct asm_region region; \
455 asm( \
456 "mov %[vb], __cfaasm_" #label "_before@GOTPCREL(%%rip)" "\n\t" \
457 "mov %[va], __cfaasm_" #label "_after@GOTPCREL(%%rip)" "\n\t" \
458 : [vb]"=r"(region.before), [va]"=r"(region.after) \
459 ); \
460 region; \
461 });
462#else
463 #error unknown hardware architecture
464#endif
465
[14a61b5]466// KERNEL ONLY
[c7a900a]467// Check if a __cfactx_switch signal handler shoud defer
[969b3fe]468// If true : preemption is safe
469// If false : preemption is unsafe and marked as pending
[82a2fed]470static inline bool preemption_ready( void * ip ) {
471 // Get all the region for which it is not safe to preempt
472 __cfaasm_label( get );
473 __cfaasm_label( check );
474 __cfaasm_label( dsable );
475 __cfaasm_label( enble );
476 __cfaasm_label( nopoll );
[14a61b5]477
[82a2fed]478 // Check if preemption is safe
479 bool ready = true;
480 if( __cfaasm_in( ip, get ) ) { ready = false; goto EXIT; };
481 if( __cfaasm_in( ip, check ) ) { ready = false; goto EXIT; };
482 if( __cfaasm_in( ip, dsable ) ) { ready = false; goto EXIT; };
483 if( __cfaasm_in( ip, enble ) ) { ready = false; goto EXIT; };
484 if( __cfaasm_in( ip, nopoll ) ) { ready = false; goto EXIT; };
485 if( !__cfaabi_tls.preemption_state.enabled) { ready = false; goto EXIT; };
486 if( __cfaabi_tls.preemption_state.in_progress ) { ready = false; goto EXIT; };
487
488EXIT:
[14a61b5]489 // Adjust the pending flag accordingly
[8fc652e0]490 __cfaabi_tls.this_processor->pending_preemption = !ready;
[969b3fe]491 return ready;
492}
493
[cd17862]494//=============================================================================================
495// Kernel Signal Startup/Shutdown logic
496//=============================================================================================
497
[969b3fe]498// Startup routine to activate preemption
499// Called from kernel_startup
[e660761]500void __kernel_alarm_startup() {
[169d944]501 __cfaabi_dbg_print_safe( "Kernel : Starting preemption\n" );
[969b3fe]502
503 // Start with preemption disabled until ready
[8fc652e0]504 __cfaabi_tls.preemption_state.enabled = false;
505 __cfaabi_tls.preemption_state.disable_count = 1;
[969b3fe]506
507 // Initialize the event kernel
508 event_kernel = (event_kernel_t *)&storage_event_kernel;
[9236060]509 (*event_kernel){};
[969b3fe]510
511 // Setup proper signal handlers
[c7a900a]512 __cfaabi_sigaction( SIGUSR1, sigHandler_ctxSwitch, SA_SIGINFO | SA_RESTART ); // __cfactx_switch handler
[c59a346]513 __cfaabi_sigaction( SIGALRM, sigHandler_alarm , SA_SIGINFO | SA_RESTART ); // debug handler
[cd17862]514
515 signal_block( SIGALRM );
516
[8c50aed]517 alarm_stack = __create_pthread( &alarm_thread, alarm_loop, 0p );
[cd17862]518}
519
[969b3fe]520// Shutdown routine to deactivate preemption
521// Called from kernel_shutdown
[e660761]522void __kernel_alarm_shutdown() {
[169d944]523 __cfaabi_dbg_print_safe( "Kernel : Preemption stopping\n" );
[d6ff3ff]524
[969b3fe]525 // Block all signals since we are already shutting down
[cd17862]526 sigset_t mask;
527 sigfillset( &mask );
[27f5f71]528 sigprocmask( SIG_BLOCK, &mask, 0p );
[cd17862]529
[969b3fe]530 // Notify the alarm thread of the shutdown
[a0b3e32]531 sigval val = { 1 };
532 pthread_sigqueue( alarm_thread, SIGALRM, val );
[969b3fe]533
534 // Wait for the preemption thread to finish
[27f5f71]535
536 pthread_join( alarm_thread, 0p );
[09d4b22]537 free( alarm_stack );
[969b3fe]538
539 // Preemption is now fully stopped
540
[169d944]541 __cfaabi_dbg_print_safe( "Kernel : Preemption stopped\n" );
[cd17862]542}
543
[969b3fe]544// Raii ctor/dtor for the preemption_scope
545// Used by thread to control when they want to receive preemption signals
[242a902]546void ?{}( preemption_scope & this, processor * proc ) {
[2a84d06d]547 (this.alarm){ proc, (Time){ 0 }, 0`s };
[242a902]548 this.proc = proc;
549 this.proc->preemption_alarm = &this.alarm;
[969b3fe]550
[d8548e2]551 update_preemption( this.proc, this.proc->cltr->preemption_rate );
[cd17862]552}
553
[242a902]554void ^?{}( preemption_scope & this ) {
[cd17862]555 disable_interrupts();
556
[2a84d06d]557 update_preemption( this.proc, 0`s );
[cd17862]558}
559
560//=============================================================================================
561// Kernel Signal Handlers
562//=============================================================================================
[54dcab1]563__cfaabi_dbg_debug_do( static thread_local void * last_interrupt = 0; )
[47ecf2b]564
[969b3fe]565// Context switch signal handler
566// Receives SIGUSR1 signal and causes the current thread to yield
[c29c342]567static void sigHandler_ctxSwitch( __CFA_SIGPARMS__ ) {
[8fc652e0]568 void * ip = (void *)(cxt->uc_mcontext.CFA_REG_IP);
569 __cfaabi_dbg_debug_do( last_interrupt = ip; )
[969b3fe]570
[4dad189]571 // SKULLDUGGERY: if a thread creates a processor and the immediately deletes it,
572 // the interrupt that is supposed to force the kernel thread to preempt might arrive
[482fa08]573 // before the kernel thread has even started running. When that happens, an interrupt
[97cba9f]574 // with a null 'this_processor' will be caught, just ignore it.
[8fc652e0]575 if(! __cfaabi_tls.this_processor ) return;
[4dad189]576
577 choose(sfp->si_value.sival_int) {
578 case PREEMPT_NORMAL : ;// Normal case, nothing to do here
[8fc652e0]579 case PREEMPT_TERMINATE: verify( __atomic_load_n( &__cfaabi_tls.this_processor->do_terminate, __ATOMIC_SEQ_CST ) );
[4dad189]580 default:
[ff878b7]581 abort( "internal error, signal value is %d", sfp->si_value.sival_int );
[4dad189]582 }
583
[b2b44d8]584 // Check if it is safe to preempt here
[82a2fed]585 if( !preemption_ready( ip ) ) { return; }
[8fc652e0]586
587 __cfaabi_dbg_print_buffer_decl( " KERNEL: preempting core %p (%p @ %p).\n", __cfaabi_tls.this_processor, __cfaabi_tls.this_thread, (void *)(cxt->uc_mcontext.CFA_REG_IP) );
[14a61b5]588
589 // Sync flag : prevent recursive calls to the signal handler
[8fc652e0]590 __cfaabi_tls.preemption_state.in_progress = true;
[14a61b5]591
[a83ffa4]592 // Clear sighandler mask before context switching.
[1f81d61]593 #if GCC_VERSION > 50000
[a83ffa4]594 static_assert( sizeof( sigset_t ) == sizeof( cxt->uc_sigmask ), "Expected cxt->uc_sigmask to be of sigset_t" );
[1f81d61]595 #endif
[27f5f71]596 if ( pthread_sigmask( SIG_SETMASK, (sigset_t *)&(cxt->uc_sigmask), 0p ) == -1 ) {
[a83ffa4]597 abort( "internal error, sigprocmask" );
598 }
[05615ba]599
[14a61b5]600 // Clear the in progress flag
[8fc652e0]601 __cfaabi_tls.preemption_state.in_progress = false;
[969b3fe]602
603 // Preemption can occur here
604
[c7a900a]605 force_yield( __ALARM_PREEMPTION ); // Do the actual __cfactx_switch
[c81ebf9]606}
607
[c59a346]608static void sigHandler_alarm( __CFA_SIGPARMS__ ) {
609 abort("SIGALRM should never reach the signal handler");
[c81ebf9]610}
611
[969b3fe]612// Main of the alarm thread
613// Waits on SIGALRM and send SIGUSR1 to whom ever needs it
[c29c342]614static void * alarm_loop( __attribute__((unused)) void * args ) {
[9b1dcc2]615 __processor_id_t id;
[58d64a4]616 id.full_proc = false;
[9b1dcc2]617 id.id = doregister(&id);
[8fc652e0]618 __cfaabi_tls.this_proc_id = &id;
[9b1dcc2]619
[969b3fe]620 // Block sigalrms to control when they arrive
[cd17862]621 sigset_t mask;
[ade5272]622 sigfillset(&mask);
[27f5f71]623 if ( pthread_sigmask( SIG_BLOCK, &mask, 0p ) == -1 ) {
[169d944]624 abort( "internal error, pthread_sigmask" );
[82ff5845]625 }
[c81ebf9]626
[ade5272]627 sigemptyset( &mask );
628 sigaddset( &mask, SIGALRM );
629
[969b3fe]630 // Main loop
[cd17862]631 while( true ) {
[969b3fe]632 // Wait for a sigalrm
[a0b3e32]633 siginfo_t info;
634 int sig = sigwaitinfo( &mask, &info );
[969b3fe]635
[e2f7bc3]636 if( sig < 0 ) {
637 //Error!
638 int err = errno;
639 switch( err ) {
640 case EAGAIN :
641 case EINTR :
[b1a4300]642 {__cfaabi_dbg_print_buffer_decl( " KERNEL: Spurious wakeup %d.\n", err );}
[e2f7bc3]643 continue;
[27f5f71]644 case EINVAL :
[169d944]645 abort( "Timeout was invalid." );
[e2f7bc3]646 default:
[169d944]647 abort( "Unhandled error %d", err);
[e2f7bc3]648 }
649 }
650
[969b3fe]651 // If another signal arrived something went wrong
[8cb529e]652 assertf(sig == SIGALRM, "Kernel Internal Error, sigwait: Unexpected signal %d (%d : %d)\n", sig, info.si_code, info.si_value.sival_int);
653
[169d944]654 // __cfaabi_dbg_print_safe( "Kernel : Caught alarm from %d with %d\n", info.si_code, info.si_value.sival_int );
[969b3fe]655 // Switch on the code (a.k.a. the sender) to
[8cb529e]656 switch( info.si_code )
[a0b3e32]657 {
[969b3fe]658 // Timers can apparently be marked as sent for the kernel
659 // In either case, tick preemption
[8cb529e]660 case SI_TIMER:
661 case SI_KERNEL:
[169d944]662 // __cfaabi_dbg_print_safe( "Kernel : Preemption thread tick\n" );
[36982fc]663 lock( event_kernel->lock __cfaabi_dbg_ctx2 );
[e873838]664 tick_preemption();
[ea7d2b0]665 unlock( event_kernel->lock );
[8cb529e]666 break;
[969b3fe]667 // Signal was not sent by the kernel but by an other thread
[8cb529e]668 case SI_QUEUE:
[969b3fe]669 // For now, other thread only signal the alarm thread to shut it down
670 // If this needs to change use info.si_value and handle the case here
[8cb529e]671 goto EXIT;
[cd17862]672 }
673 }
[a0b3e32]674
[8cb529e]675EXIT:
[169d944]676 __cfaabi_dbg_print_safe( "Kernel : Preemption thread stopping\n" );
[9b1dcc2]677 unregister(&id);
[27f5f71]678 return 0p;
[82ff5845]679}
680
[b68fc85]681//=============================================================================================
682// Kernel Signal Debug
683//=============================================================================================
684
685void __cfaabi_check_preemption() {
[8fc652e0]686 bool ready = __preemption_enabled();
[b68fc85]687 if(!ready) { abort("Preemption should be ready"); }
688
689 sigset_t oldset;
690 int ret;
[b81fd95]691 ret = pthread_sigmask(0, ( const sigset_t * ) 0p, &oldset); // workaround trac#208: cast should be unnecessary
[b68fc85]692 if(ret != 0) { abort("ERROR sigprocmask returned %d", ret); }
693
694 ret = sigismember(&oldset, SIGUSR1);
695 if(ret < 0) { abort("ERROR sigismember returned %d", ret); }
696 if(ret == 1) { abort("ERROR SIGUSR1 is disabled"); }
[a83ffa4]697
698 ret = sigismember(&oldset, SIGALRM);
699 if(ret < 0) { abort("ERROR sigismember returned %d", ret); }
700 if(ret == 0) { abort("ERROR SIGALRM is enabled"); }
701
702 ret = sigismember(&oldset, SIGTERM);
703 if(ret < 0) { abort("ERROR sigismember returned %d", ret); }
704 if(ret == 1) { abort("ERROR SIGTERM is disabled"); }
[b68fc85]705}
706
[ea8b2f7]707#ifdef __CFA_WITH_VERIFY__
708bool __cfaabi_dbg_in_kernel() {
[8fc652e0]709 return !__preemption_enabled();
[ea8b2f7]710}
711#endif
712
[6b0b624]713// Local Variables: //
714// mode: c //
715// tab-width: 4 //
716// End: //
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