Changeset ffc3b26 for src/libcfa
- Timestamp:
- Feb 1, 2017, 11:30:06 AM (8 years ago)
- Branches:
- ADT, aaron-thesis, arm-eh, ast-experimental, cleanup-dtors, deferred_resn, demangler, enum, forall-pointer-decay, jacob/cs343-translation, jenkins-sandbox, master, new-ast, new-ast-unique-expr, new-env, no_list, persistent-indexer, pthread-emulation, qualifiedEnum, resolv-new, with_gc
- Children:
- 8761006c
- Parents:
- dd0b961
- Location:
- src/libcfa/concurrency
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
src/libcfa/concurrency/CtxSwitch-x86_64.S
rdd0b961 rffc3b26 49 49 // Save volatile registers on the stack. 50 50 51 subq $8,%rsp 52 stmxcsr 0(%rsp) // 4 bytes 53 fnstcw 4(%rsp) // 2 bytes 51 54 pushq %r15 52 55 pushq %r14 … … 72 75 popq %r14 73 76 popq %r15 77 fldcw 4(%rsp) 78 ldmxcsr 0(%rsp) 79 addq $8,%rsp 74 80 75 81 // Return to thread. -
src/libcfa/concurrency/invoke.c
rdd0b961 rffc3b26 109 109 struct FakeStack { 110 110 void *fixedRegisters[5]; // fixed registers rbx, r12, r13, r14, r15 111 void *rturn; // where to go on return from uSwitch 111 uint32_t mxcr; // SSE Status and Control bits (control bits are preserved across function calls) 112 uint16_t fcw; // X97 FPU control word (preserved across function calls) 113 void *rturn; // where to go on return from uSwitch 112 114 void *dummyReturn; // NULL return address to provide proper alignment 113 115 }; … … 120 122 ((struct FakeStack *)(((struct machine_context_t *)stack->context)->SP))->fixedRegisters[0] = this; 121 123 ((struct FakeStack *)(((struct machine_context_t *)stack->context)->SP))->fixedRegisters[1] = invoke; 124 ((struct FakeStack *)(((struct machine_context_t *)stack->context)->SP))->mxcr = 0; //SSE control word must be zeroed out to be valid 125 // ((struct FakeStack *)(((struct machine_context_t *)stack->context)->SP))->fcw = 0x34; 126 // ((struct FakeStack *)(((struct machine_context_t *)stack->context)->SP))->padding = 0x56; 122 127 #else 123 128 #error Only __i386__ and __x86_64__ is supported for threads in cfa
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