Changeset fd9b524


Ignore:
Timestamp:
Aug 20, 2020, 10:56:27 PM (14 months ago)
Author:
Peter A. Buhr <pabuhr@…>
Branches:
arm-eh, jacob/cs343-translation, master, new-ast-unique-expr
Children:
74f5c83
Parents:
b8e7aed
git-author:
Peter A. Buhr <pabuhr@…> (08/20/20 22:54:39)
git-committer:
Peter A. Buhr <pabuhr@…> (08/20/20 22:56:27)
Message:

change from asm volatile(pause) to Pause()

Location:
libcfa/src
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • libcfa/src/bits/locks.hfa

    rb8e7aed rfd9b524  
    1010// Created On       : Tue Oct 31 15:14:38 2017
    1111// Last Modified By : Peter A. Buhr
    12 // Last Modified On : Tue Feb  4 13:03:19 2020
    13 // Update Count     : 11
     12// Last Modified On : Wed Aug 12 14:18:07 2020
     13// Update Count     : 13
    1414//
    1515
     
    2727
    2828// pause to prevent excess processor bus usage
    29 #if defined( __sparc )
    30         #define Pause() __asm__ __volatile__ ( "rd %ccr,%g0" )
    31 #elif defined( __i386 ) || defined( __x86_64 )
     29#if defined( __i386 ) || defined( __x86_64 )
    3230        #define Pause() __asm__ __volatile__ ( "pause" : : : )
    3331#elif defined( __ARM_ARCH )
    34         #define Pause() __asm__ __volatile__ ( "nop" : : : )
     32        #define Pause() __asm__ __volatile__ ( "YIELD" : : : )
    3533#else
    3634        #error unsupported architecture
  • libcfa/src/concurrency/kernel_private.hfa

    rb8e7aed rfd9b524  
    1010// Created On       : Mon Feb 13 12:27:26 2017
    1111// Last Modified By : Peter A. Buhr
    12 // Last Modified On : Sat Nov 30 19:25:02 2019
    13 // Update Count     : 8
     12// Last Modified On : Wed Aug 12 08:21:33 2020
     13// Update Count     : 9
    1414//
    1515
     
    132132        while( __builtin_expect(__atomic_exchange_n(ll, (bool)true, __ATOMIC_SEQ_CST), false) ) {
    133133                while(__atomic_load_n(ll, (int)__ATOMIC_RELAXED))
    134                         asm volatile("pause");
     134                        Pause();
    135135        }
    136136        /* paranoid */ verify(*ll);
     
    186186        // Step 1 : make sure no writer are in the middle of the critical section
    187187        while(__atomic_load_n(&lock, (int)__ATOMIC_RELAXED))
    188                 asm volatile("pause");
     188                Pause();
    189189
    190190        // Fence needed because we don't want to start trying to acquire the lock
  • libcfa/src/concurrency/ready_queue.cfa

    rb8e7aed rfd9b524  
    118118        __scheduler_lock_id_t * storage = (__scheduler_lock_id_t *)&data[n];
    119119        (*storage){ proc };
    120         while(true) {
     120        while() {
    121121                unsigned copy = n;
    122122                if( __atomic_load_n(&ready, __ATOMIC_RELAXED) == n
    123123                        && __atomic_compare_exchange_n(&ready, &copy, n + 1, true, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST))
    124124                        break;
    125                 asm volatile("pause");
     125                Pause();
    126126        }
    127127
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