Changeset f403c46 for doc/theses/thierry_delisle_PhD
- Timestamp:
- Aug 31, 2022, 4:37:19 PM (2 years ago)
- Branches:
- ADT, ast-experimental, master, pthread-emulation
- Children:
- b443db0
- Parents:
- 7e5da64
- File:
-
- 1 edited
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doc/theses/thierry_delisle_PhD/thesis/text/conclusion.tex
r7e5da64 rf403c46 30 30 31 31 \section{Goals} 32 33 The underlying goal of this thesis is scheduling the complex hardware components that make up a computer to provide good utilization and fairness.34 However, direct hardware scheduling is only possible in the OS.35 Instead, this thesis is performing arms-length application scheduling of the hardware components through a complex set of OS interfaces that indirectly manipulate the hardware components.36 Couple that with the OS running multiple applications with its own goals for scheduling among them.37 Hence, my goal became the battle of two schedulers.38 39 32 This work focusses on efficient and fair scheduling of the multiple CPUs, which are ubiquitous on all modern computers. 40 33 The levels of indirection to the CPUs are: … … 47 40 The OS and library presentation of disk and network I/O, and many secondary library routines that directly and indirectly use these mechanisms. 48 41 \end{itemize} 49 The key aspect of all of these mechanisms is that control flow can block, which i s the enemy of the scheduler.42 The key aspect of all of these mechanisms is that control flow can block, which immidiately hinders any level above from making scheduling decision as a result. 50 43 Fundamentally, scheduling needs to understand all the mechanisms used by threads that affect their state changes. 51 44 52 Interestingly, there is another major hardware component that affects threading: memory.53 How memory is organized, and when it is acquired and released, has a significant affect on thread scheduling.54 To this end, I worked closely with another graduate student, Mubeen Zulfiqar, in the development of a new memory allocator for \CFA.55 (See Mubeen's thesis~\cite{Zulfiqar22} for a discussion of how threading is managed in the \CFA memory-allocator.) 45 The underlying goal of this thesis is scheduling the complex hardware components that make up a computer to provide good utilization and fairness. 46 However, direct hardware scheduling is only possible in the OS. 47 Instead, this thesis is performing arms-length application scheduling of the hardware components through a set of OS interfaces that indirectly manipulate the hardware components. 48 This can quickly lead to tensions if the OS interface was built with different use cases in mind. 56 49 57 % An important aspect of this approach to threading is how threads are scheduled.58 50 As \CFA aims to increase productivity and safety of C, while maintaining its performance, this places a huge burden on the \CFA runtime to achieve these goals. 59 51 Productivity and safety manifest in removing scheduling pitfalls in the efficient usage of the threading runtime.
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