Changes in / [cb94e41:edc4813]


Ignore:
Location:
libcfa/src/concurrency
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • libcfa/src/concurrency/channel.hfa

    rcb94e41 redc4813  
    2828    unlock( lock );
    2929    park();
     30    #if defined(__ARM_ARCH)
    3031    __atomic_thread_fence( __ATOMIC_SEQ_CST );
     32    #endif
    3133    return sn.extra == 0p;
    3234}
     
    131133static inline void __cons_handoff( channel(T) & chan, T & elem ) with(chan) {
    132134    memcpy( cons`first.extra, (void *)&elem, sizeof(T) ); // do waiting consumer work
     135    #if defined(__ARM_ARCH)
    133136    __atomic_thread_fence( __ATOMIC_SEQ_CST );
     137    #endif
    134138    wake_one( cons );
    135139}
     
    138142static inline void __prods_handoff( channel(T) & chan, T & retval ) with(chan) {
    139143    memcpy( (void *)&retval, prods`first.extra, sizeof(T) );
     144    #if defined(__ARM_ARCH)
    140145    __atomic_thread_fence( __ATOMIC_SEQ_CST );
     146    #endif
    141147    wake_one( prods );
    142148}
  • libcfa/src/concurrency/locks.hfa

    rcb94e41 redc4813  
    182182static inline void lock( mcs_spin_lock & l, mcs_spin_node & n ) {
    183183    n.locked = true;
     184
     185        #if defined(__ARM_ARCH)
     186        __asm__ __volatile__ ( "DMB ISH" ::: );
     187        #endif
     188
    184189        mcs_spin_node * prev = __atomic_exchange_n(&l.queue.tail, &n, __ATOMIC_SEQ_CST);
    185190        if( prev == 0p ) return;
    186191        prev->next = &n;
     192       
     193        #if defined(__ARM_ARCH)
     194        __asm__ __volatile__ ( "DMB ISH" ::: );
     195        #endif
     196
    187197        while( __atomic_load_n(&n.locked, __ATOMIC_RELAXED) ) Pause();
     198
     199        #if defined(__ARM_ARCH)
     200        __asm__ __volatile__ ( "DMB ISH" ::: );
     201        #endif
    188202}
    189203
    190204static inline void unlock(mcs_spin_lock & l, mcs_spin_node & n) {
     205        #if defined(__ARM_ARCH)
     206        __asm__ __volatile__ ( "DMB ISH" ::: );
     207        #endif
     208
    191209        mcs_spin_node * n_ptr = &n;
    192210        if (__atomic_compare_exchange_n(&l.queue.tail, &n_ptr, 0p, false, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST)) return;
    193211        while (__atomic_load_n(&n.next, __ATOMIC_RELAXED) == 0p) Pause();
     212
     213        #if defined(__ARM_ARCH)
     214        __asm__ __volatile__ ( "DMB ISH" ::: );
     215        #endif
     216
    194217        n.next->locked = false;
    195218}
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