Ignore:
Timestamp:
Sep 2, 2022, 12:00:07 PM (20 months ago)
Author:
Thierry Delisle <tdelisle@…>
Branches:
ADT, ast-experimental, master, pthread-emulation
Children:
680137a
Parents:
836cf647
Message:

Forgot one line

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1 edited

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  • doc/theses/thierry_delisle_PhD/thesis/text/conclusion.tex

    r836cf647 re228f46  
    99However, in doing so I discovered two expected challenges.
    1010First, while modern symmetric multiprocessing CPU have significant performance penalties for communicating across cores.
    11 This makes implementing algorithm notably more difficult, since fairness generally requires \procs to be aware of each other's progress.
     11This makes implementing fair schedulers notably more difficult, since fairness generally requires \procs to be aware of each other's progress.
    1212This challenge is made even harder when comparing against MQMS schedulers (see Section\ref{sched}) which have very little inter-\proc communication.
    1313This is particularly true of state-of-the-art work-stealing schedulers, which can have virtually no inter-\proc communication in some common workloads.
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