Changeset e228f46 for doc/theses/thierry_delisle_PhD/thesis
- Timestamp:
- Sep 2, 2022, 12:00:07 PM (2 years ago)
- Branches:
- ADT, ast-experimental, master, pthread-emulation
- Children:
- 680137a
- Parents:
- 836cf647
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
doc/theses/thierry_delisle_PhD/thesis/text/conclusion.tex
r836cf647 re228f46 9 9 However, in doing so I discovered two expected challenges. 10 10 First, while modern symmetric multiprocessing CPU have significant performance penalties for communicating across cores. 11 This makes implementing algorithmnotably more difficult, since fairness generally requires \procs to be aware of each other's progress.11 This makes implementing fair schedulers notably more difficult, since fairness generally requires \procs to be aware of each other's progress. 12 12 This challenge is made even harder when comparing against MQMS schedulers (see Section\ref{sched}) which have very little inter-\proc communication. 13 13 This is particularly true of state-of-the-art work-stealing schedulers, which can have virtually no inter-\proc communication in some common workloads.
Note: See TracChangeset
for help on using the changeset viewer.