Changeset deca0f5
- Timestamp:
- Apr 18, 2019, 2:59:09 PM (5 years ago)
- Branches:
- ADT, arm-eh, ast-experimental, cleanup-dtors, enum, forall-pointer-decay, jacob/cs343-translation, jenkins-sandbox, master, new-ast, new-ast-unique-expr, pthread-emulation, qualifiedEnum
- Children:
- 8c3a0336
- Parents:
- 3c06bba
- Location:
- libcfa/src/concurrency
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
libcfa/src/concurrency/CtxSwitch-i386.S
r3c06bba rdeca0f5 52 52 movl 4(%esp),%eax 53 53 54 // Save floating & SSE control words on the stack.55 56 sub $8,%esp57 stmxcsr 0(%esp) // 4 bytes58 fnstcw 4(%esp) // 2 bytes59 60 54 // Save volatile registers on the stack. 61 55 … … 86 80 popl %ebx 87 81 88 // Load floating & SSE control words from the stack.89 90 fldcw 4(%esp)91 ldmxcsr 0(%esp)92 add $8,%esp93 94 82 // Return to thread. 95 83 -
libcfa/src/concurrency/CtxSwitch-x86_64.S
r3c06bba rdeca0f5 46 46 CtxSwitch: 47 47 48 // Save floating & SSE control words on the stack.49 50 subq $8,%rsp51 stmxcsr 0(%rsp) // 4 bytes52 fnstcw 4(%rsp) // 2 bytes53 54 48 // Save volatile registers on the stack. 55 49 … … 78 72 popq %r15 79 73 80 // Load floating & SSE control words from the stack.81 82 fldcw 4(%rsp)83 ldmxcsr 0(%rsp)84 addq $8,%rsp85 86 74 // Return to thread. 87 75 88 76 ret 89 77 .size CtxSwitch, .-CtxSwitch 90 91 92 //.text93 // .align 294 //.globl CtxStore95 //CtxStore:96 // // Save floating & SSE control words on the stack.97 //98 // subq $8,%rsp99 // stmxcsr 0(%rsp) // 4 bytes100 // fnstcw 4(%rsp) // 2 bytes101 //102 // // Save volatile registers on the stack.103 //104 // pushq %r15105 // pushq %r14106 // pushq %r13107 // pushq %r12108 // pushq %rbx109 //110 // // Save old context in the "from" area.111 //112 // movq %rsp,SP_OFFSET(%rdi)113 // movq %rbp,FP_OFFSET(%rdi)114 //115 // // Return to thread116 //117 // ret118 //119 //.text120 // .align 2121 //.globl CtxRet122 //CtxRet:123 // // Load new context from the "to" area.124 //125 // movq SP_OFFSET(%rdi),%rsp126 // movq FP_OFFSET(%rdi),%rbp127 //128 // // Load volatile registers from the stack.129 //130 // popq %rbx131 // popq %r12132 // popq %r13133 // popq %r14134 // popq %r15135 //136 // // Load floating & SSE control words from the stack.137 //138 // fldcw 4(%rsp)139 // ldmxcsr 0(%rsp)140 // addq $8,%rsp141 //142 // // Return to thread.143 //144 // ret145 146 78 147 79 .text -
libcfa/src/concurrency/invoke.c
r3c06bba rdeca0f5 124 124 struct FakeStack { 125 125 void *fixedRegisters[3]; // fixed registers ebx, edi, esi (popped on 1st uSwitch, values unimportant) 126 uint32_t mxcr; // SSE Status and Control bits (control bits are preserved across function calls)127 uint16_t fcw; // X97 FPU control word (preserved across function calls)128 126 void *rturn; // where to go on return from uSwitch 129 127 void *dummyReturn; // fake return compiler would have pushed on call to uInvoke … … 140 138 fs->argument[0] = this; // argument to invoke 141 139 fs->rturn = invoke; 142 fs->mxcr = 0x1F80; //Vol. 2A 3-520143 fs->fcw = 0x037F; //Vol. 1 8-7144 140 145 141 #elif defined( __x86_64 ) … … 147 143 struct FakeStack { 148 144 void *fixedRegisters[5]; // fixed registers rbx, r12, r13, r14, r15 149 uint32_t mxcr; // SSE Status and Control bits (control bits are preserved across function calls)150 uint16_t fcw; // X97 FPU control word (preserved across function calls)151 145 void *rturn; // where to go on return from uSwitch 152 146 void *dummyReturn; // NULL return address to provide proper alignment … … 162 156 fs->fixedRegisters[0] = this; 163 157 fs->fixedRegisters[1] = invoke; 164 fs->mxcr = 0x1F80; //Vol. 2A 3-520165 fs->fcw = 0x037F; //Vol. 1 8-7166 158 167 159 #elif defined( __ARM_ARCH ) -
libcfa/src/concurrency/invoke.h
r3c06bba rdeca0f5 264 264 // void CtxRet ( void * dst ) asm ("CtxRet"); 265 265 266 #if defined( __i386 )267 #define CtxGet( ctx ) __asm__ ( \268 "movl %%esp,%0\n" \269 "movl %%ebp,%1\n" \270 : "=rm" (ctx.SP), "=rm" (ctx.FP) )271 #elif defined( __x86_64 )272 #define CtxGet( ctx ) __asm__ ( \273 "movq %%rsp,%0\n" \274 "movq %%rbp,%1\n" \275 : "=rm" (ctx.SP), "=rm" (ctx.FP) )276 #elif defined( __ARM_ARCH )277 #define CtxGet( ctx ) __asm__ ( \278 "mov %0,%%sp\n" \279 "mov %1,%%r11\n" \280 : "=rm" (ctx.SP), "=rm" (ctx.FP) )281 #else282 #error unknown hardware architecture283 #endif284 285 266 #endif //_INVOKE_PRIVATE_H_ 286 267 #endif //! defined(__CFA_INVOKE_PRIVATE__) -
libcfa/src/concurrency/kernel.cfa
r3c06bba rdeca0f5 36 36 #include "invoke.h" 37 37 38 //----------------------------------------------------------------------------- 39 // Some assembly required 40 #if defined( __i386 ) 41 #define CtxGet( ctx ) \ 42 __asm__ volatile ( \ 43 "movl %%esp,%0\n"\ 44 "movl %%ebp,%1\n"\ 45 : "=rm" (ctx.SP),\ 46 "=rm" (ctx.FP) \ 47 ) 48 49 // mxcr : SSE Status and Control bits (control bits are preserved across function calls) 50 // fcw : X87 FPU control word (preserved across function calls) 51 #define __x87_store \ 52 uint32_t __mxcr; \ 53 uint16_t __fcw; \ 54 __asm__ volatile ( \ 55 "stmxcsr %0\n" \ 56 "fnstcw %1\n" \ 57 : "=m" (__mxcr),\ 58 "=m" (__fcw) \ 59 ) 60 61 #define __x87_load \ 62 __asm__ volatile ( \ 63 "fldcw %1\n" \ 64 "ldmxcsr %0\n" \ 65 ::"m" (__mxcr),\ 66 "m" (__fcw) \ 67 ) 68 69 #elif defined( __x86_64 ) 70 #define CtxGet( ctx ) \ 71 __asm__ volatile ( \ 72 "movq %%rsp,%0\n"\ 73 "movq %%rbp,%1\n"\ 74 : "=rm" (ctx.SP),\ 75 "=rm" (ctx.FP) \ 76 ) 77 78 #define __x87_store \ 79 uint32_t __mxcr; \ 80 uint16_t __fcw; \ 81 __asm__ volatile ( \ 82 "stmxcsr %0\n" \ 83 "fnstcw %1\n" \ 84 : "=m" (__mxcr),\ 85 "=m" (__fcw) \ 86 ) 87 88 #define __x87_load \ 89 __asm__ volatile ( \ 90 "fldcw %1\n" \ 91 "ldmxcsr %0\n" \ 92 :: "m" (__mxcr),\ 93 "m" (__fcw) \ 94 ) 95 96 97 #elif defined( __ARM_ARCH ) 98 #define CtxGet( ctx ) __asm__ ( \ 99 "mov %0,%%sp\n" \ 100 "mov %1,%%r11\n" \ 101 : "=rm" (ctx.SP), "=rm" (ctx.FP) ) 102 #else 103 #error unknown hardware architecture 104 #endif 105 106 //----------------------------------------------------------------------------- 38 107 //Start and stop routine for the kernel, declared first to make sure they run first 39 108 static void kernel_startup(void) __attribute__(( constructor( STARTUP_PRIORITY_KERNEL ) )); … … 274 343 proc_cor->state = Active; 275 344 int local_errno = *__volatile_errno(); 345 #if defined( __i386 ) || defined( __x86_64 ) 346 __x87_store; 347 #endif 276 348 277 349 // set new coroutine that the processor is executing … … 283 355 proc_cor->state = proc_cor->state == Halted ? Halted : Inactive; 284 356 thrd_src->state = Active; 357 358 #if defined( __i386 ) || defined( __x86_64 ) 359 __x87_load; 360 #endif 285 361 *__volatile_errno() = local_errno; 286 362 }
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