Changes in src/tests/sched-ext-dtor.c [b8116cd:ca278c1]
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src/tests/sched-ext-dtor.c (modified) (2 diffs)
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src/tests/sched-ext-dtor.c
rb8116cd rca278c1 14 14 static const unsigned long N = 5_000ul; 15 15 16 thread dummy_t {}; 16 enum state_t { 17 CTOR, 18 MAIN, 19 AFTER, 20 END, 21 DTOR 22 }; 23 24 thread dummy_t { 25 state_t state; 26 }; 27 28 static inline void set_state( dummy_t & this, state_t state) { 29 switch(state) { 30 case CTOR : break; 31 case MAIN : if( this.state != CTOR ) { serr | "ERROR Expected state to be CTOR" | endl; abort(); } this.state = state; break; 32 case AFTER : if( this.state != MAIN ) { serr | "ERROR Expected state to be MAIN" | endl; abort(); } this.state = state; break; 33 case END : if( this.state != AFTER ) { serr | "ERROR Expected state to be AFTER" | endl; abort(); } this.state = state; break; 34 case DTOR : if( this.state != END ) { serr | "ERROR Expected state to be END" | endl; abort(); } this.state = state; break; 35 } 36 } 17 37 18 38 void ^?{}( dummy_t & mutex this ) { 19 sout | "Dtor" | endl; 39 set_state( this, DTOR ); 40 } 41 42 void ?{}( dummy_t & this ) { 43 this.state = CTOR; 20 44 } 21 45 22 46 void main( dummy_t & this ) { 23 47 yield(((unsigned)rand48()) % 10); 24 s out | "Main";48 set_state( this, MAIN ); 25 49 waitfor( ^?{}, this ) { 26 s out | "After waitfor";50 set_state( this, AFTER ); 27 51 } 28 s out | "Ending Main";52 set_state( this, END ); 29 53 } 30 54 … … 33 57 processor p; 34 58 for( int i = 0; i < N; i++ ){ 35 dummy_t dummy ;59 dummy_t dummy[4]; 36 60 yield( ((unsigned)rand48()) % 100 ); 37 61 }
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