Changes in src/tests/sched-ext-dtor.c [ca278c1:b8116cd]
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src/tests/sched-ext-dtor.c (modified) (2 diffs)
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src/tests/sched-ext-dtor.c
rca278c1 rb8116cd 14 14 static const unsigned long N = 5_000ul; 15 15 16 enum state_t { 17 CTOR, 18 MAIN, 19 AFTER, 20 END, 21 DTOR 22 }; 23 24 thread dummy_t { 25 state_t state; 26 }; 27 28 static inline void set_state( dummy_t & this, state_t state) { 29 switch(state) { 30 case CTOR : break; 31 case MAIN : if( this.state != CTOR ) { serr | "ERROR Expected state to be CTOR" | endl; abort(); } this.state = state; break; 32 case AFTER : if( this.state != MAIN ) { serr | "ERROR Expected state to be MAIN" | endl; abort(); } this.state = state; break; 33 case END : if( this.state != AFTER ) { serr | "ERROR Expected state to be AFTER" | endl; abort(); } this.state = state; break; 34 case DTOR : if( this.state != END ) { serr | "ERROR Expected state to be END" | endl; abort(); } this.state = state; break; 35 } 36 } 16 thread dummy_t {}; 37 17 38 18 void ^?{}( dummy_t & mutex this ) { 39 set_state( this, DTOR ); 40 } 41 42 void ?{}( dummy_t & this ) { 43 this.state = CTOR; 19 sout | "Dtor" | endl; 44 20 } 45 21 46 22 void main( dummy_t & this ) { 47 23 yield(((unsigned)rand48()) % 10); 48 s et_state( this, MAIN );24 sout | "Main"; 49 25 waitfor( ^?{}, this ) { 50 s et_state( this, AFTER );26 sout | "After waitfor"; 51 27 } 52 s et_state( this, END );28 sout | "Ending Main"; 53 29 } 54 30 … … 57 33 processor p; 58 34 for( int i = 0; i < N; i++ ){ 59 dummy_t dummy [4];35 dummy_t dummy; 60 36 yield( ((unsigned)rand48()) % 100 ); 61 37 }
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