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src/libcfa/concurrency/preemption.c (modified) (4 diffs)
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src/libcfa/concurrency/preemption.c
r13073be ra83ffa4 161 161 void disable_interrupts() { 162 162 with( kernelTLS.preemption_state ) { 163 static_assert(__atomic_always_lock_free(sizeof(enabled), &enabled), "Must be lock-free"); 164 165 // Set enabled flag to false 166 // should be atomic to avoid preemption in the middle of the operation. 167 // use memory order RELAXED since there is no inter-thread on this variable requirements 168 __atomic_store_n(&enabled, false, __ATOMIC_RELAXED); 169 170 // Signal the compiler that a fence is needed but only for signal handlers 171 __atomic_signal_fence(__ATOMIC_ACQUIRE); 172 163 enabled = false; 173 164 __attribute__((unused)) unsigned short new_val = disable_count + 1; 174 165 disable_count = new_val; … … 180 171 // If counter reaches 0, execute any pending CtxSwitch 181 172 void enable_interrupts( __cfaabi_dbg_ctx_param ) { 182 processor * proc = kernelTLS.this_processor; // Cache the processor now since interrupts can start happening after the atomic store183 thread_desc * thrd = kernelTLS.this_thread; // Cache the thread now since interrupts can start happening after the atomic store173 processor * proc = kernelTLS.this_processor; // Cache the processor now since interrupts can start happening after the atomic add 174 thread_desc * thrd = kernelTLS.this_thread; // Cache the thread now since interrupts can start happening after the atomic add 184 175 185 176 with( kernelTLS.preemption_state ){ … … 190 181 // Check if we need to prempt the thread because an interrupt was missed 191 182 if( prev == 1 ) { 192 static_assert(__atomic_always_lock_free(sizeof(enabled), &enabled), "Must be lock-free"); 193 194 // Set enabled flag to true 195 // should be atomic to avoid preemption in the middle of the operation. 196 // use memory order RELAXED since there is no inter-thread on this variable requirements 197 __atomic_store_n(&enabled, true, __ATOMIC_RELAXED); 198 199 // Signal the compiler that a fence is needed but only for signal handlers 200 __atomic_signal_fence(__ATOMIC_RELEASE); 183 enabled = true; 201 184 if( proc->pending_preemption ) { 202 185 proc->pending_preemption = false; … … 217 200 verifyf( prev != 0u, "Incremented from %u\n", prev ); // If this triggers someone is enabled already enabled interrupts 218 201 if( prev == 1 ) { 219 static_assert(__atomic_always_lock_free(sizeof(kernelTLS.preemption_state.enabled), &kernelTLS.preemption_state.enabled), "Must be lock-free"); 220 // Set enabled flag to true 221 // should be atomic to avoid preemption in the middle of the operation. 222 // use memory order RELAXED since there is no inter-thread on this variable requirements 223 __atomic_store_n(&kernelTLS.preemption_state.enabled, true, __ATOMIC_RELAXED); 224 225 // Signal the compiler that a fence is needed but only for signal handlers 226 __atomic_signal_fence(__ATOMIC_RELEASE); 202 kernelTLS.preemption_state.enabled = true; 227 203 } 228 204 }
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