Changeset 901c0f6 for doc/theses/thierry_delisle_PhD/thesis/text
- Timestamp:
- Sep 5, 2022, 10:47:52 PM (2 years ago)
- Branches:
- ADT, ast-experimental, master, pthread-emulation
- Children:
- 1aca1b3
- Parents:
- 1fcbce7 (diff), 83cb754 (diff)
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doc/theses/thierry_delisle_PhD/thesis/text/conclusion.tex
r1fcbce7 r901c0f6 5 5 Because I am the main developer for both components of this project, there is strong continuity across the design and implementation. 6 6 This continuity provides a consistent approach to advanced control-flow and concurrency, with easier development, management and maintenance of the runtime in the future. 7 7 8 I believed my Masters work would provide the background to make the Ph.D work reasonably straightforward. 8 9 However, I discovered two significant challenges. … … 108 109 As such, simply moving on without the result is likely to be acceptable. 109 110 Another option is to read multiple memory addresses and only wait for \emph{one of} these reads to retire. 110 This approach has a similar effect, where cache lines with more traffic are on less often.111 This approach has a similar effect, where cache lines with more traffic are waited on less often. 111 112 In both of these examples, some care is needed to ensure that reads to an address \emph{sometime} retire. 112 113
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