Ignore:
Timestamp:
Sep 5, 2022, 7:53:25 PM (2 years ago)
Author:
Thierry Delisle <tdelisle@…>
Branches:
ADT, ast-experimental, master, pthread-emulation
Children:
901c0f6
Parents:
0fec6c1
Message:

Fixed minor typo

File:
1 edited

Legend:

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  • doc/theses/thierry_delisle_PhD/thesis/text/conclusion.tex

    r0fec6c1 r83cb754  
    55Because I am the main developer for both components of this project, there is strong continuity across the design and implementation.
    66This continuity provides a consistent approach to advanced control-flow and concurrency, with easier development, management and maintenance of the runtime in the future.
     7
    78I believed my Masters work would provide the background to make the Ph.D work reasonably straightforward.
    89However, I discovered two significant challenges.
     
    108109As such, simply moving on without the result is likely to be acceptable.
    109110Another option is to read multiple memory addresses and only wait for \emph{one of} these reads to retire.
    110 This approach has a similar effect, where cache lines with more traffic are on less often.
     111This approach has a similar effect, where cache lines with more traffic are waited on less often.
    111112In both of these examples, some care is needed to ensure that reads to an address \emph{sometime} retire.
    112113
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