Changeset 7a29392f for doc/papers/llheap/figures

Timestamp:

Mar 6, 2024, 8:26:49 AM (14 months ago)

Author:

Peter A. Buhr <pabuhr@…>

Branches:

master

Children:

7e13b11

Parents:

647d633

Message:

continue work on memory allocation paper

File:

• doc/papers/llheap/figures/AddressSpace.fig (modified) (1 diff)

doc/papers/llheap/figures/AddressSpace.fig ¶

@@ -9 +9 @@
 1200 2
 2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
-         5700 1350 6600 1350 6600 2100 5700 2100 5700 1350
-2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
-         1200 1350 2100 1350 2100 2100 1200 2100 1200 1350
-2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
-         4800 1350 5700 1350 5700 2100 4800 2100 4800 1350
+         1200 1200 2100 1200 2100 1800 1200 1800 1200 1200
+2 2 0 1 0 7 60 -1 17 0.000 0 0 -1 0 0 5
+         2100 1200 3000 1200 3000 1800 2100 1800 2100 1200
 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
         1 1 1.00 45.00 90.00
-         2100 1725 2400 1725
+         2100 1500 2400 1500
 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
         1 1 1.00 45.00 90.00
-         3000 1725 2700 1725
+         3000 1500 2700 1500
+2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
+         3000 1200 3900 1200 3900 1800 3000 1800 3000 1200
+2 2 0 1 0 7 60 -1 17 0.000 0 0 -1 0 0 5
+         3900 1200 4800 1200 4800 1800 3900 1800 3900 1200
 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
         1 1 1.00 45.00 90.00
-         3900 1725 4200 1725
+         3900 1500 4200 1500
 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
         1 1 1.00 45.00 90.00
-         4800 1725 4500 1725
-2 2 0 1 0 7 60 -1 17 0.000 0 0 -1 0 0 5
-         2100 1350 3000 1350 3000 2100 2100 2100 2100 1350
+         4800 1500 4500 1500
 2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
-         3000 1350 3900 1350 3900 2100 3000 2100 3000 1350
-2 2 0 1 0 7 60 -1 17 0.000 0 0 -1 0 0 5
-         3900 1350 4800 1350 4800 2100 3900 2100 3900 1350
-4 0 0 50 -1 0 10 0.0000 2 180 900 1200 2325 high address\001
-4 2 0 50 -1 0 10 0.0000 2 135 855 6600 2325 low address\001
-4 1 0 50 -1 0 10 0.0000 2 120 330 6150 2025 Data\001
-4 1 0 50 -1 0 10 0.0000 2 135 675 6150 1800 Code and\001
-4 1 0 50 -1 0 10 0.0000 2 120 390 6150 1575 Static\001
-4 1 0 50 -1 0 10 0.0000 2 135 390 1650 1800 Stack\001
-4 1 0 50 -1 0 10 0.0000 2 165 615 2550 1950 Memory\001
-4 1 0 50 -1 0 10 0.0000 2 165 615 4350 1950 Memory\001
-4 1 0 50 -1 0 10 0.0000 2 120 315 2550 1650 Free\001
-4 1 0 50 -1 0 10 0.0000 2 120 330 3450 2025 Data\001
-4 1 0 50 -1 0 10 0.0000 2 135 675 3450 1800 Code and\001
-4 1 0 50 -1 0 10 0.0000 2 165 645 3450 1575 Dynamic\001
-4 1 0 50 -1 0 10 0.0000 2 120 315 4350 1650 Free\001
-4 1 0 50 -1 0 10 0.0000 2 120 735 5250 1950 Allocation\001
-4 1 0 50 -1 0 10 0.0000 2 165 645 5250 1650 Dynamic\001
+         4800 1200 5700 1200 5700 1800 4800 1800 4800 1200
+2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5
+         5700 1200 6600 1200 6600 1800 5700 1800 5700 1200
+4 0 0 50 -1 0 10 0.0000 2 165 870 1200 2025 high address\001
+4 2 0 50 -1 0 10 0.0000 2 120 810 6600 2025 low address\001
+4 1 0 50 -1 0 10 0.0000 2 120 375 1650 1575 Stack\001
+4 1 0 50 -1 0 10 0.0000 2 150 600 2550 1725 Memory\001
+4 1 0 50 -1 0 10 0.0000 2 120 300 2550 1425 Free\001
+4 1 0 50 -1 0 10 0.0000 2 120 660 3450 1575 Code and\001
+4 1 0 50 -1 0 10 0.0000 2 150 630 3450 1350 Dynamic\001
+4 1 0 50 -1 0 10 0.0000 2 120 315 3450 1775 Data\001
+4 1 0 50 -1 0 10 0.0000 2 120 300 4350 1425 Free\001
+4 1 0 50 -1 0 10 0.0000 2 150 600 4350 1725 Memory\001
+4 1 4 50 -1 0 10 0.0000 2 150 630 5250 1425 Dynamic\001
+4 1 0 50 -1 0 10 0.0000 2 120 315 6150 1775 Data\001
+4 1 0 50 -1 0 10 0.0000 2 120 660 6150 1575 Code and\001
+4 1 0 50 -1 0 10 0.0000 2 120 375 6150 1350 Static\001
+4 1 4 50 -1 0 10 0.0000 2 120 720 5250 1725 Allocation\001