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libcfa/src/concurrency/locks.hfa (modified) (1 diff)
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libcfa/src/concurrency/locks.hfa
r55b060d r2ad5e1d5 182 182 static inline void lock( mcs_spin_lock & l, mcs_spin_node & n ) { 183 183 n.locked = true; 184 185 #if defined(__ARM_ARCH) 186 __asm__ __volatile__ ( "DMB ISH" ::: ); 187 #endif 188 184 189 mcs_spin_node * prev = __atomic_exchange_n(&l.queue.tail, &n, __ATOMIC_SEQ_CST); 185 190 if( prev == 0p ) return; 186 191 prev->next = &n; 192 193 #if defined(__ARM_ARCH) 194 __asm__ __volatile__ ( "DMB ISH" ::: ); 195 #endif 196 187 197 while( __atomic_load_n(&n.locked, __ATOMIC_RELAXED) ) Pause(); 198 199 #if defined(__ARM_ARCH) 200 __asm__ __volatile__ ( "DMB ISH" ::: ); 201 #endif 188 202 } 189 203 190 204 static inline void unlock(mcs_spin_lock & l, mcs_spin_node & n) { 205 #if defined(__ARM_ARCH) 206 __asm__ __volatile__ ( "DMB ISH" ::: ); 207 #endif 208 191 209 mcs_spin_node * n_ptr = &n; 192 210 if (__atomic_compare_exchange_n(&l.queue.tail, &n_ptr, 0p, false, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST)) return; 193 211 while (__atomic_load_n(&n.next, __ATOMIC_RELAXED) == 0p) Pause(); 212 213 #if defined(__ARM_ARCH) 214 __asm__ __volatile__ ( "DMB ISH" ::: ); 215 #endif 216 194 217 n.next->locked = false; 195 218 }
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