Changeset 054514d for src/libcfa/concurrency

Timestamp:

May 29, 2018, 3:26:31 PM (7 years ago)

Author:

Rob Schluntz <rschlunt@…>

Branches:

ADT, aaron-thesis, arm-eh, ast-experimental, cleanup-dtors, deferred_resn, demangler, enum, forall-pointer-decay, jacob/cs343-translation, jenkins-sandbox, master, new-ast, new-ast-unique-expr, new-env, no_list, persistent-indexer, pthread-emulation, qualifiedEnum, with_gc

Children:

3530f39a

Parents:

96812c0 (diff), da60c631 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.

Message:

Merge branch 'master' of plg.uwaterloo.ca:/u/cforall/software/cfa/cfa-cc

Location:

src/libcfa/concurrency

Files:

• alarm.c (modified) (2 diffs)
• preemption.c (modified) (5 diffs)

src/libcfa/concurrency/alarm.c

@@ -10 +10 @@
 // Created On       : Fri Jun 2 11:31:25 2017
 // Last Modified By : Peter A. Buhr
-// Last Modified On : Mon Apr  9 13:36:18 2018
-// Update Count     : 61
+// Last Modified On : Fri May 25 06:25:47 2018
+// Update Count     : 67
 //
 
@@ -37 +37 @@
 
 void __kernel_set_timer( Duration alarm ) {
-        verifyf(alarm >= 1`us || alarm == 0, "Setting timer to < 1us (%luns)", alarm.tv);
+        verifyf(alarm >= 1`us || alarm == 0, "Setting timer to < 1us (%jins)", alarm.tv);
         setitimer( ITIMER_REAL, &(itimerval){ alarm }, NULL );
 }

src/libcfa/concurrency/preemption.c

@@ -161 +161 @@
         void disable_interrupts() {
                 with( kernelTLS.preemption_state ) {
-                        enabled = false;
+                        #if GCC_VERSION > 50000
+                        static_assert(__atomic_always_lock_free(sizeof(enabled), &enabled), "Must be lock-free");
+                        #endif
+
+                        // Set enabled flag to false
+                        // should be atomic to avoid preemption in the middle of the operation.
+                        // use memory order RELAXED since there is no inter-thread on this variable requirements
+                        __atomic_store_n(&enabled, false, __ATOMIC_RELAXED);
+
+                        // Signal the compiler that a fence is needed but only for signal handlers
+                        __atomic_signal_fence(__ATOMIC_ACQUIRE);
+
                         __attribute__((unused)) unsigned short new_val = disable_count + 1;
                         disable_count = new_val;
@@ -171 +182 @@
         // If counter reaches 0, execute any pending CtxSwitch
         void enable_interrupts( __cfaabi_dbg_ctx_param ) {
-                processor   * proc = kernelTLS.this_processor; // Cache the processor now since interrupts can start happening after the atomic add
-                thread_desc * thrd = kernelTLS.this_thread;       // Cache the thread now since interrupts can start happening after the atomic add
+                processor   * proc = kernelTLS.this_processor; // Cache the processor now since interrupts can start happening after the atomic store
+                thread_desc * thrd = kernelTLS.this_thread;       // Cache the thread now since interrupts can start happening after the atomic store
 
                 with( kernelTLS.preemption_state ){
@@ -181 +192 @@
                         // Check if we need to prempt the thread because an interrupt was missed
                         if( prev == 1 ) {
-                                enabled = true;
+                                #if GCC_VERSION > 50000
+                                static_assert(__atomic_always_lock_free(sizeof(enabled), &enabled), "Must be lock-free");
+                                #endif
+
+                                // Set enabled flag to true
+                                // should be atomic to avoid preemption in the middle of the operation.
+                                // use memory order RELAXED since there is no inter-thread on this variable requirements
+                                __atomic_store_n(&enabled, true, __ATOMIC_RELAXED);
+
+                                // Signal the compiler that a fence is needed but only for signal handlers
+                                __atomic_signal_fence(__ATOMIC_RELEASE);
                                 if( proc->pending_preemption ) {
                                         proc->pending_preemption = false;
@@ -200 +221 @@
                 verifyf( prev != 0u, "Incremented from %u\n", prev );                     // If this triggers someone is enabled already enabled interrupts
                 if( prev == 1 ) {
-                        kernelTLS.preemption_state.enabled = true;
+                        #if GCC_VERSION > 50000
+                        static_assert(__atomic_always_lock_free(sizeof(kernelTLS.preemption_state.enabled), &kernelTLS.preemption_state.enabled), "Must be lock-free");
+                        #endif
+                        // Set enabled flag to true
+                        // should be atomic to avoid preemption in the middle of the operation.
+                        // use memory order RELAXED since there is no inter-thread on this variable requirements
+                        __atomic_store_n(&kernelTLS.preemption_state.enabled, true, __ATOMIC_RELAXED);
+
+                        // Signal the compiler that a fence is needed but only for signal handlers
+                        __atomic_signal_fence(__ATOMIC_RELEASE);
                 }
         }
@@ -352 +382 @@
 
         // Clear sighandler mask before context switching.
+        #if GCC_VERSION > 50000
         static_assert( sizeof( sigset_t ) == sizeof( cxt->uc_sigmask ), "Expected cxt->uc_sigmask to be of sigset_t" );
+        #endif
         if ( pthread_sigmask( SIG_SETMASK, (sigset_t *)&(cxt->uc_sigmask), NULL ) == -1 ) {
                 abort( "internal error, sigprocmask" );