Changes in / [7192145:04994aa]

File:

• benchmark/readyQ/cycle.go (modified) (1 diff)

benchmark/readyQ/cycle.go

@@ -14 +14 @@
         for true {
                 <- mine
-                next <- 0
+                select {
+                case next <- 0:
+                default:
+                }
                 count += 1
                 if  clock_mode && atomic.LoadInt32(&stop) == 1 { break }