Changeset 0254454


Ignore:
Timestamp:
Aug 24, 2020, 8:34:39 PM (4 years ago)
Author:
Peter A. Buhr <pabuhr@…>
Branches:
ADT, arm-eh, ast-experimental, enum, forall-pointer-decay, jacob/cs343-translation, master, new-ast-unique-expr, pthread-emulation, qualifiedEnum
Children:
95472ee, a6cafa8
Parents:
7cfef0d (diff), 9509a412 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge branch 'master' of plg.uwaterloo.ca:software/cfa/cfa-cc into master

Files:
3 edited
1 moved

Legend:

Unmodified
Added
Removed

  • doc/theses/thierry_delisle_PhD/comp_II/comp_II.tex

    r7cfef0d r0254454  
    4444\begin{document}
    4545\maketitle
     46\thispagestyle{empty}
    4647\cleardoublepage
    4748
    … …  
    327328
    328329How much scalability is actually needed is highly debatable.
    329 \emph{libfibre}\cite{libfibre} has compared favorably to other schedulers in webserver tests\cite{karstenuser} and uses a single atomic counter in its scheduling algorithm similarly to the proposed bitmask.
     330\emph{libfibre}\cite{libfibre} has compared favorably to other schedulers in webserver tests\cite{Karsten20} and uses a single atomic counter in its scheduling algorithm similarly to the proposed bitmask.
    330331As such, the single atomic instruction on a shared cacheline may be sufficiently performant.
    331332
    … …  
    421422Processors that are unnecessarily unblocked lead to unnecessary contention, CPU usage, and power consumption, while too many sleeping processors can lead to sub-optimal throughput.
    422423Furthermore, transitions from sleeping to awake and vice-versa also add unnecessary latency.
    423 There is already a wealth of research on the subject\cite{schillings1996engineering, wiki:thunderherd} and I may use an existing approach for the idle-sleep heuristic in this project, \eg\cite{karstenuser}.
     424There is already a wealth of research on the subject\cite{schillings1996engineering, wiki:thunderherd} and I may use an existing approach for the idle-sleep heuristic in this project, \eg\cite{Karsten20}.
    424425
    425426\subsection{Asynchronous I/O}

  • tests/pybin/settings.py

    r7cfef0d r0254454  
    2727                'x86_64'      : 'x64',
    2828                'x86'         : 'x86',
    29                 'aarch64'     : 'arm',
     29                'aarch64'     : 'arm64',
     30                'arm64'       : 'arm64',
     31                'ARM64'       : 'arm64',
    3032                'i386'        : 'x86',
    3133                'i486'        : 'x86',
    3234                'i686'        : 'x86',
    3335                'Intel 80386' : 'x86',
    34                 'arm'         : 'arm',
    35                 'ARM'         : 'arm',
     36                'arm'         : 'arm32',
     37                'ARM'         : 'arm32',
     38                'arm32'       : 'arm32',
     39                'ARM32'       : 'arm32',
    3640        }
    3741
    3842        CrossCompileFlags = {
    39                 'x64' : 'ARCH_FLAGS=-m64',
    40                 'x86' : 'ARCH_FLAGS=-m32',
     43                'x64'  : 'ARCH_FLAGS=-m64',
     44                'x86'  : 'ARCH_FLAGS=-m32',
     45                'arm64': 'ARCH_FLAGS=',
     46                'arm32': 'ARCH_FLAGS=',
    4147        }
    4248

  • tools/build/cfa.m4

    r7cfef0d r0254454  
    6666                "x86-64"     ) cannon_arch_name="x64";;
    6767                "x86_64"     ) cannon_arch_name="x64";;
    68                 "aarch64"    ) cannon_arch_name="arm";;
     68                "aarch64"    ) cannon_arch_name="arm64";;
     69                "arm4"       ) cannon_arch_name="arm64";;
     70                "ARM64"      ) cannon_arch_name="arm64";;
    6971                "x86"        ) cannon_arch_name="x86";;
    7072                "i386"       ) cannon_arch_name="x86";;
    … …  
    7274                "i686"       ) cannon_arch_name="x86";;
    7375                "Intel 80386") cannon_arch_name="x86";;
    74                 "arm"        ) cannon_arch_name="arm";;
    75                 "ARM"        ) cannon_arch_name="arm";;
    76                 "armv7l"     ) cannon_arch_name="arm";;
     76                "arm"        ) cannon_arch_name="arm32";;
     77                "ARM"        ) cannon_arch_name="arm32";;
     78                "arm32"      ) cannon_arch_name="arm32";;
     79                "ARM32"      ) cannon_arch_name="arm32";;
     80                "armv7l"     ) cannon_arch_name="arm32";;
    7781                *)
    7882                >&2 echo "Unknown architecture " $arch_name;
Note: See TracChangeset for help on using the changeset viewer.