source: libcfa/src/bits/defs.hfa @ dca5802

ADTarm-ehast-experimentalenumforall-pointer-decayjacob/cs343-translationnew-astnew-ast-unique-exprpthread-emulationqualifiedEnum
Last change on this file since dca5802 was dca5802, checked in by Thierry Delisle <tdelisle@…>, 4 years ago

Started doing some of the x86 implementations and some changes after a code review

  • Property mode set to 100644
File size: 3.8 KB
Line 
1//
2// Cforall Version 1.0.0 Copyright (C) 2016 University of Waterloo
3//
4// The contents of this file are covered under the licence agreement in the
5// file "LICENCE" distributed with Cforall.
6//
7// defs.hfa --
8//
9// Author           : Thierry Delisle
10// Created On       : Thu Nov  9 13:24:10 2017
11// Last Modified By : Peter A. Buhr
12// Last Modified On : Thu Feb  8 16:22:41 2018
13// Update Count     : 8
14//
15
16#pragma once
17
18#include <stdbool.h>
19#include <stddef.h>
20#include <stdint.h>
21
22#define likely(x)   __builtin_expect(!!(x), 1)
23#define unlikely(x) __builtin_expect(!!(x), 0)
24#define thread_local _Thread_local
25
26typedef void (*fptr_t)();
27typedef int_fast16_t __lock_size_t;
28
29#ifdef __cforall
30#define __cfa_anonymous_object(x) inline struct x
31#else
32#define __cfa_anonymous_object(x) x __cfa_anonymous_object
33#endif
34
35#ifdef __cforall
36void abort ( const char fmt[], ... ) __attribute__ (( format(printf, 1, 2), __nothrow__, __leaf__, __noreturn__ ));
37extern "C" {
38#endif
39void __cabi_abort( const char fmt[], ... ) __attribute__ (( format(printf, 1, 2), __nothrow__, __leaf__, __noreturn__ ));
40#ifdef __cforall
41}
42#endif
43
44#if defined(__cforall_thread__)
45#define OPTIONAL_THREAD
46#else
47#define OPTIONAL_THREAD __attribute__((weak))
48#endif
49
50static inline long long rdtscl(void) {
51    unsigned int lo, hi;
52    __asm__ __volatile__ ("rdtsc" : "=a"(lo), "=d"(hi));
53    return ( (unsigned long long)lo)|( ((unsigned long long)hi)<<32 );
54}
55
56// #define __CFA_NO_BIT_TEST_AND_SET__
57
58#if defined( __i386 )
59static inline bool __atomic_bts(volatile unsigned long int * target, unsigned long int bit ) {
60        #if defined(__CFA_NO_BIT_TEST_AND_SET__)
61        unsigned long int mask = 1ul << bit;
62        unsigned long int ret = __atomic_fetch_or(target, mask, (int)__ATOMIC_RELAXED);
63        return (ret & mask) != 0;
64    #else
65        int result = 0;
66        asm volatile(
67            "LOCK btsl %[bit], %[target]\n\t"
68            : "=@ccc" (result)
69            : [target] "m" (*target), [bit] "r" (bit)
70        );
71        return result != 0;
72    #endif
73}
74
75static inline bool __atomic_btr(volatile unsigned long int * target, unsigned long int bit ) {
76        #if defined(__CFA_NO_BIT_TEST_AND_SET__)
77        unsigned long int mask = 1ul << bit;
78        unsigned long int ret = __atomic_fetch_and(target, ~mask, (int)__ATOMIC_RELAXED);
79        return (ret & mask) != 0;
80        #else
81        int result = 0;
82        asm volatile(
83            "LOCK btrl %[bit], %[target]\n\t"
84            :"=@ccc" (result)
85            : [target] "m" (*target), [bit] "r" (bit)
86        );
87        return result != 0;
88    #endif
89}
90#elif defined( __x86_64 )
91static inline bool __atomic_bts(volatile unsigned long long int * target, unsigned long long int bit ) {
92        #if defined(__CFA_NO_BIT_TEST_AND_SET__)
93        unsigned long long int mask = 1ul << bit;
94        unsigned long long int ret = __atomic_fetch_or(target, mask, (int)__ATOMIC_RELAXED);
95        return (ret & mask) != 0;
96    #else
97        int result = 0;
98        asm volatile(
99            "LOCK btsq %[bit], %[target]\n\t"
100            : "=@ccc" (result)
101            : [target] "m" (*target), [bit] "r" (bit)
102        );
103        return result != 0;
104    #endif
105}
106
107static inline bool __atomic_btr(volatile unsigned long long int * target, unsigned long long int bit ) {
108        #if defined(__CFA_NO_BIT_TEST_AND_SET__)
109        unsigned long long int mask = 1ul << bit;
110        unsigned long long int ret = __atomic_fetch_and(target, ~mask, (int)__ATOMIC_RELAXED);
111        return (ret & mask) != 0;
112        #else
113        int result = 0;
114        asm volatile(
115            "LOCK btrq %[bit], %[target]\n\t"
116            :"=@ccc" (result)
117            : [target] "m" (*target), [bit] "r" (bit)
118        );
119        return result != 0;
120    #endif
121}
122#elif defined( __ARM_ARCH )
123    #error __atomic_bts and __atomic_btr not implemented for arm
124#else
125        #error uknown hardware architecture
126#endif
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