source: doc/theses/thierry_delisle_PhD/thesis/fig/system.fig @ 4b75ae9

Last change on this file since 4b75ae9 was 9b817e15, checked in by Peter A. Buhr <pabuhr@…>, 2 years ago

update system figure
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RevLine 
[b9537e6]1#FIG 3.2  Produced by xfig version 3.2.7b
[86c1f1c3]2Landscape
3Center
4Inches
5Letter
6100.00
7Single
8-2
91200 2
106 3855 2775 4155 2925
111 3 0 1 0 0 0 0 0 0.000 1 0.0000 3930 2850 30 30 3930 2850 3960 2880
121 3 0 1 0 0 0 0 0 0.000 1 0.0000 4035 2850 30 30 4035 2850 4065 2880
13-6
146 4755 3525 5055 3675
151 3 0 1 0 0 0 0 0 0.000 1 0.0000 4830 3600 30 30 4830 3600 4860 3630
161 3 0 1 0 0 0 0 0 0.000 1 0.0000 4935 3600 30 30 4935 3600 4965 3630
17-6
186 4650 2775 4950 2925
191 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 4725 2850 15 15 4725 2850 4740 2865
201 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 4800 2850 15 15 4800 2850 4815 2865
211 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 4875 2850 15 15 4875 2850 4890 2865
22-6
236 3225 2400 3525 2550
241 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 3300 2475 15 15 3300 2475 3315 2490
251 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 3375 2475 15 15 3375 2475 3390 2490
261 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 3450 2475 15 15 3450 2475 3465 2490
27-6
286 5475 3450 5625 3750
291 3 0 1 -1 -1 0 0 20 0.000 1 4.7120 5550 3525 15 15 5550 3525 5535 3540
301 3 0 1 -1 -1 0 0 20 0.000 1 4.7120 5550 3600 15 15 5550 3600 5535 3615
311 3 0 1 -1 -1 0 0 20 0.000 1 4.7120 5550 3675 15 15 5550 3675 5535 3690
32-6
336 4275 3525 4575 3675
341 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 4350 3600 15 15 4350 3600 4365 3615
351 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 4425 3600 15 15 4425 3600 4440 3615
361 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 4500 3600 15 15 4500 3600 4515 3615
37-6
386 6675 3525 8025 3975
392 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
40        1 1 1.00 45.00 90.00
41         6675 3750 6975 3750
422 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
43        1 1 1.00 45.00 90.00
44         7125 3750 7350 3750
452 2 0 1 -1 -1 0 0 -1 0.000 0 0 0 0 0 5
46         7800 3975 7800 3525 7350 3525 7350 3975 7800 3975
472 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
48        1 1 1.00 45.00 90.00
49         7800 3750 8025 3750
50-6
[9b817e15]516 4125 4725 4950 4950
521 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4250 4838 100 100 4250 4838 4350 4838
534 0 -1 0 0 0 12 0.0000 2 135 510 4425 4875 thread\001
54-6
556 5175 4725 6300 4950
562 2 0 1 -1 -1 0 0 -1 0.000 0 0 0 0 0 5
57         5400 4950 5400 4725 5175 4725 5175 4950 5400 4950
584 0 -1 0 0 0 12 0.0000 2 135 765 5475 4875 processor\001
59-6
606 6600 4725 7500 4950
612 2 1 1 -1 -1 0 0 -1 3.000 0 0 0 0 0 5
62         6825 4950 6600 4950 6600 4725 6825 4725 6825 4950
634 0 -1 0 0 0 12 0.0000 2 135 540 6900 4875 cluster\001
64-6
656 2175 4725 3975 4950
661 3 0 1 0 0 0 0 0 0.000 1 0.0000 2250 4830 30 30 2250 4830 2280 4830
674 0 -1 0 0 0 12 0.0000 2 180 1605 2325 4875 generator/coroutine\001
68-6
696 1575 2550 2775 3900
702 2 0 1 -1 -1 0 0 -1 0.000 0 0 0 0 0 5
71         2400 3450 2400 3000 1950 3000 1950 3450 2400 3450
724 1 -1 0 0 0 12 0.0000 2 135 1170 2175 2700 Discrete-event\001
734 1 -1 0 0 0 12 0.0000 2 180 720 2175 2925 Manager\001
744 1 -1 0 0 0 12 0.0000 2 180 930 2175 3675 preemption\001
754 1 -1 0 0 0 12 0.0000 2 135 630 2175 3900 timeout\001
76-6
[86c1f1c3]771 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 5550 2625 150 150 5550 2625 5700 2625
781 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 5550 3225 150 150 5550 3225 5700 3225
791 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 5550 3975 150 150 5550 3975 5700 3975
801 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3525 2850 150 150 3525 2850 3675 2850
811 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4200 2475 150 150 4200 2475 4350 2475
821 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4425 2850 150 150 4425 2850 4575 2850
831 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4650 2475 150 150 4650 2475 4800 2475
841 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3975 3600 150 150 3975 3600 4125 3600
851 3 0 1 0 0 0 0 0 0.000 1 0.0000 3525 3600 30 30 3525 3600 3555 3630
861 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3750 2475 150 150 3750 2475 3900 2625
871 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4875 3600 150 150 4875 3600 5025 3750
881 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3975 2850 150 150 3975 2850 4125 2850
891 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 7200 2775 150 150 7200 2775 7350 2775
901 3 0 1 0 0 0 0 0 0.000 1 0.0000 7200 2775 30 30 7200 2775 7230 2805
911 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3525 3600 150 150 3525 3600 3675 3600
922 2 1 1 -1 -1 0 0 -1 4.000 0 0 0 0 0 5
93         6300 4500 6300 1800 3000 1800 3000 4500 6300 4500
942 2 0 1 -1 -1 0 0 -1 0.000 0 0 0 0 0 5
95         5775 2850 5775 2400 5325 2400 5325 2850 5775 2850
962 2 0 1 -1 -1 0 0 -1 0.000 0 0 0 0 0 5
97         5775 4200 5775 3750 5325 3750 5325 4200 5775 4200
982 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
99        1 1 1.00 45.00 90.00
100         5175 3975 5325 3975
1012 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
102        1 1 1.00 45.00 90.00
103         5175 3225 5325 3225
1042 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
105        1 1 1.00 45.00 90.00
106         5175 2625 5325 2625
1072 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
108        1 1 1.00 45.00 90.00
109         5775 3975 5925 3975
1102 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
111        1 1 1.00 45.00 90.00
112         5775 3225 5925 3225
1132 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
114        1 1 1.00 45.00 90.00
115         5775 2625 5925 2625
1162 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2
117         5175 3975 5175 2625
1182 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
119        1 1 1.00 45.00 90.00
120         5925 3975 5925 2025
1212 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
122        1 1 1.00 45.00 90.00
123         5925 3750 6225 3750
1242 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
125        1 1 1.00 45.00 90.00
126         3450 2625 3225 2625
1272 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 3
128        1 1 1.00 45.00 90.00
129         5925 2025 4200 2025 4200 2250
1302 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2
131         3225 2625 3225 3600
1322 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
133        1 1 1.00 45.00 90.00
134         3075 3600 3375 3600
1352 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
136        1 1 1.00 45.00 90.00
137         3675 3600 3825 3600
1382 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
139        1 1 1.00 45.00 90.00
140         4125 3600 4275 3600
1412 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
142        1 1 1.00 45.00 90.00
143         4575 3600 4725 3600
1442 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
145        1 1 1.00 45.00 90.00
146         5025 3600 5175 3600
1472 2 0 1 -1 -1 0 0 -1 0.000 0 0 0 0 0 5
148         5775 3450 5775 3000 5325 3000 5325 3450 5775 3450
1492 2 1 1 -1 -1 0 0 -1 4.000 0 0 0 0 0 5
150         8100 4500 8100 1800 6600 1800 6600 4500 8100 4500
1512 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 2
152        1 1 1.00 45.00 90.00
153         7050 2775 6825 2775
1542 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2
155         6825 2775 6825 3750
1562 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 1 0 4
157        1 1 1.00 45.00 90.00
158         7875 3750 7875 2325 7200 2325 7200 2550
[9b817e15]1594 1 -1 0 0 0 12 0.0000 2 135 840 5550 4425 Processors\001
1604 1 -1 0 0 0 12 0.0000 2 180 1215 4200 3975 Ready Threads\001
1614 1 -1 0 0 0 12 0.0000 2 165 1275 7350 1725 Other Cluster(s)\001
1624 1 -1 0 0 0 12 0.0000 2 135 990 4650 1725 User Cluster\001
1634 1 -1 0 0 0 12 0.0000 2 135 1380 4200 3225 Blocked Threads\001
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