| 1 | #pragma once
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| 2 |
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| 3 | #include <cassert>
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| 4 | #include <cstddef>
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| 5 | #include <atomic>
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| 6 | #include <chrono>
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| 7 | #include <fstream>
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| 8 | #include <iostream>
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| 9 |
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| 10 | #include <unistd.h>
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| 11 | #include <sys/sysinfo.h>
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| 12 |
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| 13 | // #include <x86intrin.h>
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| 14 |
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| 15 | // class Random {
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| 16 | // private:
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| 17 | // unsigned int seed;
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| 18 | // public:
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| 19 | // Random(int seed) {
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| 20 | // this->seed = seed;
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| 21 | // }
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| 22 |
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| 23 | // /** returns pseudorandom x satisfying 0 <= x < n. **/
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| 24 | // unsigned int next() {
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| 25 | // seed ^= seed << 6;
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| 26 | // seed ^= seed >> 21;
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| 27 | // seed ^= seed << 7;
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| 28 | // return seed;
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| 29 | // }
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| 30 | // };
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| 31 |
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| 32 | constexpr uint64_t extendedEuclidY(uint64_t a, uint64_t b);
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| 33 | constexpr uint64_t extendedEuclidX(uint64_t a, uint64_t b){
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| 34 | return (b==0) ? 1 : extendedEuclidY(b, a - b * (a / b));
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| 35 | }
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| 36 | constexpr uint64_t extendedEuclidY(uint64_t a, uint64_t b){
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| 37 | return (b==0) ? 0 : extendedEuclidX(b, a - b * (a / b)) - (a / b) * extendedEuclidY(b, a - b * (a / b));
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| 38 | }
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| 39 |
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| 40 | class Random {
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| 41 | private:
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| 42 | uint64_t x;
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| 43 |
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| 44 | static constexpr const uint64_t M = 1ul << 48ul;
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| 45 | static constexpr const uint64_t A = 25214903917;
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| 46 | static constexpr const uint64_t C = 11;
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| 47 | static constexpr const uint64_t D = 16;
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| 48 |
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| 49 | public:
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| 50 | static constexpr const uint64_t m = M;
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| 51 | static constexpr const uint64_t a = A;
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| 52 | static constexpr const uint64_t c = C;
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| 53 | static constexpr const uint64_t d = D;
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| 54 | static constexpr const uint64_t ai = extendedEuclidX(A, M);
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| 55 | public:
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| 56 | Random(unsigned int seed) {
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| 57 | this->x = seed * a;
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| 58 | }
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| 59 |
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| 60 | /** returns pseudorandom x satisfying 0 <= x < n. **/
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| 61 | unsigned int next() {
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| 62 | //nextx = (a * x + c) % m;
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| 63 | x = (A * x + C) & (M - 1);
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| 64 | return x >> D;
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| 65 | }
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| 66 | unsigned int prev() {
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| 67 | //prevx = (ainverse * (x - c)) mod m
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| 68 | unsigned int r = x >> D;
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| 69 | x = ai * (x - C) & (M - 1);
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| 70 | return r;
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| 71 | }
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| 72 |
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| 73 | void set_raw_state(uint64_t _x) {
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| 74 | this->x = _x;
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| 75 | }
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| 76 |
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| 77 | uint64_t get_raw_state() {
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| 78 | return this->x;
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| 79 | }
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| 80 | };
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| 81 |
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| 82 | static inline long long int rdtscl(void) {
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| 83 | #if defined( __i386 ) || defined( __x86_64 )
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| 84 | unsigned int lo, hi;
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| 85 | __asm__ __volatile__ ("rdtsc" : "=a"(lo), "=d"(hi));
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| 86 | return ( (unsigned long long)lo)|( ((unsigned long long)hi)<<32 );
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| 87 | #elif defined( __aarch64__ ) || defined( __arm__ )
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| 88 | // https://github.com/google/benchmark/blob/v1.1.0/src/cycleclock.h#L116
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| 89 | long long int virtual_timer_value;
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| 90 | asm volatile("mrs %0, cntvct_el0" : "=r"(virtual_timer_value));
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| 91 | return virtual_timer_value;
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| 92 | #else
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| 93 | #error unsupported hardware architecture
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| 94 | #endif
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| 95 | }
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| 96 |
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| 97 | #if defined( __i386 ) || defined( __x86_64 )
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| 98 | #define Pause() __asm__ __volatile__ ( "pause" : : : )
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| 99 | #elif defined( __ARM_ARCH )
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| 100 | #define Pause() __asm__ __volatile__ ( "YIELD" : : : )
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| 101 | #else
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| 102 | #error unsupported architecture
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| 103 | #endif
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| 104 |
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| 105 | static inline void affinity(int tid) {
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| 106 | static int cpus = get_nprocs();
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| 107 |
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| 108 | cpu_set_t mask;
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| 109 | CPU_ZERO(&mask);
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| 110 | int cpu = cpus - tid; // Set CPU affinity to tid, starting from the end
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| 111 | CPU_SET(cpu, &mask);
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| 112 | auto result = sched_setaffinity(0, sizeof(mask), &mask);
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| 113 | if(result != 0) {
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| 114 | std::cerr << "Affinity set failed with " << result<< ", wanted " << cpu << std::endl;
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| 115 | }
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| 116 | }
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| 117 |
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| 118 | static const constexpr std::size_t cache_line_size = 64;
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| 119 | static inline void check_cache_line_size() {
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| 120 | std::cout << "Checking cache line size" << std::endl;
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| 121 | const std::string cache_file = "/sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size";
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| 122 |
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| 123 | std::ifstream ifs (cache_file, std::ifstream::in);
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| 124 |
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| 125 | if(!ifs.good()) {
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| 126 | std::cerr << "Could not open file to check cache line size" << std::endl;
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| 127 | std::cerr << "Looking for: " << cache_file << std::endl;
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| 128 | std::exit(2);
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| 129 | }
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| 130 |
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| 131 | size_t got;
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| 132 | ifs >> got;
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| 133 |
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| 134 | ifs.close();
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| 135 |
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| 136 | if(cache_line_size != got) {
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| 137 | std::cerr << "Cache line has incorrect size : " << got << std::endl;
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| 138 | std::exit(1);
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| 139 | }
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| 140 |
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| 141 | std::cout << "Done" << std::endl;
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| 142 | }
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| 143 |
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| 144 | using Clock = std::chrono::high_resolution_clock;
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| 145 | using duration_t = std::chrono::duration<double>;
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| 146 | using std::chrono::nanoseconds;
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| 147 |
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| 148 | template<typename Ratio, typename T>
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| 149 | T duration_cast(T seconds) {
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| 150 | return std::chrono::duration_cast<std::chrono::duration<T, Ratio>>(std::chrono::duration<T>(seconds)).count();
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| 151 | }
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| 152 |
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| 153 | static inline unsigned rand_bit(unsigned rnum, size_t mask) __attribute__((artificial));
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| 154 | static inline unsigned rand_bit(unsigned rnum, size_t mask) {
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| 155 | unsigned bit = mask ? rnum % __builtin_popcountl(mask) : 0;
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| 156 | #if !defined(__BMI2__)
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| 157 | uint64_t v = mask; // Input value to find position with rank r.
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| 158 | unsigned int r = bit + 1;// Input: bit's desired rank [1-64].
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| 159 | unsigned int s; // Output: Resulting position of bit with rank r [1-64]
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| 160 | uint64_t a, b, c, d; // Intermediate temporaries for bit count.
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| 161 | unsigned int t; // Bit count temporary.
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| 162 |
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| 163 | // Do a normal parallel bit count for a 64-bit integer,
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| 164 | // but store all intermediate steps.
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| 165 | a = v - ((v >> 1) & ~0UL/3);
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| 166 | b = (a & ~0UL/5) + ((a >> 2) & ~0UL/5);
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| 167 | c = (b + (b >> 4)) & ~0UL/0x11;
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| 168 | d = (c + (c >> 8)) & ~0UL/0x101;
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| 169 |
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| 170 |
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| 171 | t = (d >> 32) + (d >> 48);
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| 172 | // Now do branchless select!
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| 173 | s = 64;
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| 174 | s -= ((t - r) & 256) >> 3; r -= (t & ((t - r) >> 8));
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| 175 | t = (d >> (s - 16)) & 0xff;
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| 176 | s -= ((t - r) & 256) >> 4; r -= (t & ((t - r) >> 8));
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| 177 | t = (c >> (s - 8)) & 0xf;
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| 178 | s -= ((t - r) & 256) >> 5; r -= (t & ((t - r) >> 8));
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| 179 | t = (b >> (s - 4)) & 0x7;
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| 180 | s -= ((t - r) & 256) >> 6; r -= (t & ((t - r) >> 8));
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| 181 | t = (a >> (s - 2)) & 0x3;
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| 182 | s -= ((t - r) & 256) >> 7; r -= (t & ((t - r) >> 8));
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| 183 | t = (v >> (s - 1)) & 0x1;
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| 184 | s -= ((t - r) & 256) >> 8;
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| 185 | return s - 1;
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| 186 | #else
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| 187 | uint64_t picked = _pdep_u64(1ul << bit, mask);
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| 188 | return picked ? __builtin_ctzl(picked) : 0;
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| 189 | #endif
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| 190 | }
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| 191 |
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| 192 | // Barrier from
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| 193 | class barrier_t {
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| 194 | public:
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| 195 | barrier_t(size_t total)
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| 196 | : waiting(0)
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| 197 | , total(total)
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| 198 | {}
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| 199 |
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| 200 | void wait(unsigned) {
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| 201 | size_t target = waiting++;
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| 202 | target = (target - (target % total)) + total;
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| 203 | while(waiting < target)
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| 204 | Pause();
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| 205 |
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| 206 | assert(waiting < (1ul << 60));
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| 207 | }
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| 208 |
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| 209 | private:
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| 210 | std::atomic<size_t> waiting;
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| 211 | size_t total;
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| 212 | };
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| 213 |
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| 214 | struct spinlock_t {
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| 215 | std::atomic_bool ll = { false };
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| 216 |
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| 217 | inline void lock() {
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| 218 | while( __builtin_expect(ll.exchange(true),false) ) {
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| 219 | while(ll.load(std::memory_order_relaxed))
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| 220 | Pause();
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| 221 | }
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| 222 | }
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| 223 |
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| 224 | inline bool try_lock() {
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| 225 | return false == ll.exchange(true);
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| 226 | }
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| 227 |
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| 228 | inline void unlock() {
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| 229 | ll.store(false, std::memory_order_release);
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| 230 | }
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| 231 |
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| 232 | inline explicit operator bool() {
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| 233 | return ll.load(std::memory_order_relaxed);
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| 234 | }
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| 235 | };
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| 236 |
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| 237 | static inline bool bts(std::atomic_size_t & target, size_t bit ) {
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| 238 | //*
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| 239 | int result = 0;
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| 240 | asm volatile(
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| 241 | "LOCK btsq %[bit], %[target]\n\t"
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| 242 | :"=@ccc" (result)
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| 243 | : [target] "m" (target), [bit] "r" (bit)
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| 244 | );
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| 245 | return result != 0;
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| 246 | /*/
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| 247 | size_t mask = 1ul << bit;
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| 248 | size_t ret = target.fetch_or(mask, std::memory_order_relaxed);
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| 249 | return (ret & mask) != 0;
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| 250 | //*/
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| 251 | }
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| 252 |
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| 253 | static inline bool btr(std::atomic_size_t & target, size_t bit ) {
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| 254 | //*
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| 255 | int result = 0;
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| 256 | asm volatile(
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| 257 | "LOCK btrq %[bit], %[target]\n\t"
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| 258 | :"=@ccc" (result)
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| 259 | : [target] "m" (target), [bit] "r" (bit)
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| 260 | );
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| 261 | return result != 0;
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| 262 | /*/
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| 263 | size_t mask = 1ul << bit;
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| 264 | size_t ret = target.fetch_and(~mask, std::memory_order_relaxed);
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| 265 | return (ret & mask) != 0;
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| 266 | //*/
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| 267 | }
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