[b1bdc7d6] | 1 | #FIG 3.2 Produced by xfig version 3.2.5c |
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| 2 | Landscape |
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| 3 | Center |
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| 4 | Inches |
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| 5 | Letter |
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| 6 | 100.00 |
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| 7 | Single |
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| 8 | -2 |
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| 9 | 1200 2 |
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| 10 | 5 1 0 1 -1 -1 0 0 -1 0.000 0 1 0 0 3150.000 3450.000 3150 3150 2850 3450 3150 3750 |
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| 11 | 5 1 0 1 -1 -1 0 0 -1 0.000 0 1 0 0 3150.000 4350.000 3150 4050 2850 4350 3150 4650 |
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| 12 | 6 5850 1950 6150 2250 |
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| 13 | 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 6000 2100 105 105 6000 2100 6105 2205 |
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| 14 | 4 1 -1 0 0 0 10 0.0000 2 105 90 6000 2160 d\001 |
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| 15 | -6 |
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| 16 | 6 5850 1650 6150 1950 |
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| 17 | 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 6000 1800 105 105 6000 1800 6105 1905 |
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| 18 | 4 1 -1 0 0 0 10 0.0000 2 105 90 6000 1860 b\001 |
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| 19 | -6 |
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| 20 | 6 5100 1800 5400 2100 |
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| 21 | 1 3 0 1 -1 -1 1 0 4 0.000 1 0.0000 5250 1950 105 105 5250 1950 5355 1950 |
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| 22 | 4 1 -1 0 0 0 10 0.0000 2 105 120 5250 2010 Y\001 |
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| 23 | -6 |
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| 24 | 6 5100 2100 5400 2400 |
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| 25 | 1 3 0 1 -1 -1 1 0 4 0.000 1 0.0000 5250 2250 105 105 5250 2250 5355 2250 |
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| 26 | 4 1 -1 0 0 0 10 0.0000 2 105 120 5250 2295 X\001 |
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| 27 | -6 |
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| 28 | 6 3000 5400 7200 5700 |
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| 29 | 1 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 3150 5550 80 80 3150 5550 3230 5630 |
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| 30 | 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4500 5550 105 105 4500 5550 4605 5655 |
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| 31 | 1 3 0 1 -1 -1 0 0 4 0.000 1 0.0000 6000 5550 105 105 6000 5550 6105 5655 |
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| 32 | 4 0 -1 0 0 0 12 0.0000 2 135 1035 4725 5625 blocked task\001 |
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| 33 | 4 0 -1 0 0 0 12 0.0000 2 135 870 3300 5625 active task\001 |
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| 34 | 4 0 -1 0 0 0 12 0.0000 2 180 930 6225 5625 routine ptrs\001 |
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| 35 | -6 |
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| 36 | 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3300 3600 105 105 3300 3600 3405 3705 |
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| 37 | 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3600 3600 105 105 3600 3600 3705 3705 |
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| 38 | 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 6600 3900 105 105 6600 3900 6705 4005 |
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| 39 | 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 6900 3900 105 105 6900 3900 7005 4005 |
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| 40 | 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 6000 2700 105 105 6000 2700 6105 2805 |
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| 41 | 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 6000 2400 105 105 6000 2400 6105 2505 |
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| 42 | 1 3 0 1 -1 -1 0 0 20 0.000 1 0.0000 5100 4575 80 80 5100 4575 5180 4655 |
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| 43 | 2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 |
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| 44 | 4050 2925 5475 2925 5475 3225 4050 3225 4050 2925 |
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| 45 | 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2 |
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| 46 | 5850 2850 6075 3000 |
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| 47 | 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 4 |
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| 48 | 3150 3750 3750 3750 3750 4050 3150 4050 |
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| 49 | 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 3 |
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| 50 | 3150 3450 3750 3450 3900 3675 |
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| 51 | 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2 |
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| 52 | 3750 3150 3600 3375 |
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| 53 | 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 3 |
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| 54 | 3150 4350 3750 4350 3900 4575 |
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| 55 | 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2 |
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| 56 | 3750 4050 3600 4275 |
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| 57 | 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 4 |
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| 58 | 3150 4650 3750 4650 3750 4950 4950 4950 |
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| 59 | 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2 |
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| 60 | 6450 3750 6300 3975 |
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| 61 | 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 2 |
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| 62 | 4950 4950 5175 5100 |
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| 63 | 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 9 |
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| 64 | 5250 4950 6450 4950 6450 4050 7050 4050 7050 3750 6450 3750 |
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| 65 | 6450 2850 6150 2850 6150 1650 |
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| 66 | 2 2 1 1 -1 -1 0 0 -1 4.000 0 0 0 0 0 5 |
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| 67 | 5850 4200 5850 3300 4350 3300 4350 4200 5850 4200 |
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| 68 | 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 3 |
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| 69 | 5250 2850 5850 2850 5850 1650 |
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| 70 | 2 1 0 1 -1 -1 0 0 -1 0.000 0 0 -1 0 0 4 |
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| 71 | 3150 3150 3750 3150 3750 2850 5325 2850 |
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| 72 | 2 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 1 2 |
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| 73 | 1 1 1.00 60.00 120.00 |
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| 74 | 7 1 1.00 60.00 120.00 |
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| 75 | 5250 3150 5250 2400 |
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| 76 | 2 2 0 1 0 7 50 -1 -1 0.000 0 0 -1 0 0 5 |
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| 77 | 5100 1800 5400 1800 5400 2400 5100 2400 5100 1800 |
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| 78 | 4 0 0 50 -1 0 11 0.0000 2 150 795 4275 3150 Queues Ptr\001 |
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| 79 | 4 1 -1 0 0 0 10 0.0000 2 75 75 6000 2745 a\001 |
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| 80 | 4 1 -1 0 0 0 10 0.0000 2 75 75 6000 2445 c\001 |
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| 81 | 4 1 -1 0 0 0 12 0.0000 2 135 315 5100 5325 exit\001 |
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| 82 | 4 1 -1 0 0 0 12 0.0000 2 135 135 3300 3075 A\001 |
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| 83 | 4 1 -1 0 0 0 12 0.0000 2 135 795 3300 4875 condition\001 |
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| 84 | 4 1 -1 0 0 0 12 0.0000 2 135 135 3300 5100 B\001 |
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| 85 | 4 0 -1 0 0 0 12 0.0000 2 135 420 6600 3675 stack\001 |
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| 86 | 4 0 -1 0 0 0 12 0.0000 2 180 750 6600 3225 acceptor/\001 |
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| 87 | 4 0 -1 0 0 0 12 0.0000 2 180 750 6600 3450 signalled\001 |
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| 88 | 4 1 -1 0 0 0 12 0.0000 2 135 795 3300 2850 condition\001 |
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| 89 | 4 1 -1 0 0 0 12 0.0000 2 165 420 6000 1350 entry\001 |
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| 90 | 4 1 -1 0 0 0 12 0.0000 2 135 495 6000 1575 queue\001 |
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| 91 | 4 0 -1 0 0 0 12 0.0000 2 135 525 6300 2400 arrival\001 |
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| 92 | 4 0 -1 0 0 0 12 0.0000 2 135 630 6300 2175 order of\001 |
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| 93 | 4 1 -1 0 0 0 12 0.0000 2 135 525 5100 3675 shared\001 |
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| 94 | 4 1 -1 0 0 0 12 0.0000 2 135 735 5100 3975 variables\001 |
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| 95 | 4 0 0 50 -1 0 11 0.0000 2 165 855 4125 2175 Acceptables\001 |
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