Index: src/libcfa/bits/locks.h =================================================================== --- src/libcfa/bits/locks.h (revision 764b4b24dbc67225234679918ac1f34d96d5feed) +++ src/libcfa/bits/locks.h (revision c916e12b46506cdadc4003fc6a5ad660791983d9) @@ -9,7 +9,7 @@ // Author : Thierry Delisle // Created On : Tue Oct 31 15:14:38 2017 -// Last Modified By : -- -// Last Modified On : -- -// Update Count : 0 +// Last Modified By : Peter A. Buhr +// Last Modified On : Fri Dec 8 16:02:22 2017 +// Update Count : 1 // @@ -24,9 +24,11 @@ #elif defined( __i386 ) || defined( __x86_64 ) #define Pause() __asm__ __volatile__ ( "pause" : : : ) +#elif defined( __ARM_ARCH ) + #define Pause() __asm__ __volatile__ ( "nop" : : : ) #else #error unsupported architecture #endif -#if defined( __i386 ) || defined( __x86_64 ) +#if defined( __i386 ) || defined( __x86_64 ) || defined( __ARM_ARCH ) // Intel recommendation #define __ALIGN__ __attribute__(( aligned (128) )) @@ -37,8 +39,8 @@ #endif -#if defined( __x86_64 ) +#if __SIZEOF_SIZE_T__ == 8 #define __lock_test_and_test_and_set( lock ) (lock) == 0 && __sync_lock_test_and_set_8( &(lock), 1 ) == 0 #define __lock_release( lock ) __sync_lock_release_8( &(lock) ); -#elif defined( __i386 ) +#elif __SIZEOF_SIZE_T__ == 4 #define __lock_test_and_test_and_set( lock ) (lock) == 0 && __sync_lock_test_and_set_4( &(lock), 1 ) == 0 #define __lock_release( lock ) __sync_lock_release_4( &(lock) ); @@ -48,5 +50,5 @@ struct __spinlock_t { - __ALIGN__ volatile uintptr_t lock; + __ALIGN__ volatile size_t lock; #ifdef __CFA_DEBUG__ const char * prev_name; Index: src/libcfa/concurrency/CtxSwitch-armv7l.S =================================================================== --- src/libcfa/concurrency/CtxSwitch-armv7l.S (revision c916e12b46506cdadc4003fc6a5ad660791983d9) +++ src/libcfa/concurrency/CtxSwitch-armv7l.S (revision c916e12b46506cdadc4003fc6a5ad660791983d9) @@ -0,0 +1,62 @@ + @ 32 bit ARM context switch + @ This function assumes that r9 has no special meaning on the platform it's + @ being built on. + @ If r9 is special, uncomment the following line and it will be left alone + + @ #define R9_SPECIAL + + #define PTR_BYTE 4 + #define SP_OFFSET ( 0 * PTR_BYTE ) + #define FP_OFFSET ( 1 * PTR_BYTE ) + #define PC_OFFSET ( 2 * PTR_BYTE ) + + .text + .align 2 + .global CtxSwitch + .type CtxSwitch, %function + +CtxSwitch: + @ save callee-saved registers: r4-r8, r10, r11, r13(sp) (plus r9 depending on platform specification) + @ I've seen reference to 31 registers on 64-bit, if this is the case, more need to be saved + @ save thread state registers: r14(lr) + @ r12(ip) is intra-procedure-call scratch register, does not need saving between function calls + + #ifdef R9_SPECIAL + stmfd r13!, {r4-r8,r10,r11,r14} + #else + stmfd r13!, {r4-r11,r14} + #endif // R9_SPECIAL + + @ save floating point registers: s16-s31 + vstmdb r13!, {s16-s31} + + @ save frame pointer and stack pointer to outgoing datastructure + str sp, [r0, #SP_OFFSET] + str fp, [r0, #FP_OFFSET] + + @ restore frame pointer and stack pointer from incoming datastructure + ldr fp, [r1, #FP_OFFSET] + ldr sp, [r1, #SP_OFFSET] + + @ restore floating point registers: s16-s31 + vldm r13!, {s16-s31} + @ restore r14(lr) + @ restore 64-bit extra registers? + @ restore callee-saved registers: r4-r8, r10, r11, r13 + + #ifdef R9_SPECIAL + ldmfd r13!, {r4-r8,r10,r11,r15} + #else + ldmfd r13!, {r4-r11,r14} @ loading r14 back into r15 returns + + mov r15, r14 + #endif // R9_SPECIAL + + .text + .align 2 + .global CtxInvokeStub + .type CtxInvokeStub, %function + +CtxInvokeStub: + ldmfd r13!, {r0-r1} + mov r15, r1 Index: src/libcfa/concurrency/invoke.c =================================================================== --- src/libcfa/concurrency/invoke.c (revision 764b4b24dbc67225234679918ac1f34d96d5feed) +++ src/libcfa/concurrency/invoke.c (revision c916e12b46506cdadc4003fc6a5ad660791983d9) @@ -10,6 +10,6 @@ // Created On : Tue Jan 17 12:27:26 2016 // Last Modified By : Peter A. Buhr -// Last Modified On : Fri Jul 21 22:28:33 2017 -// Update Count : 1 +// Last Modified On : Tue Jan 23 14:04:56 2018 +// Update Count : 2 // @@ -133,4 +133,21 @@ ((struct FakeStack *)(((struct machine_context_t *)stack->context)->SP))->mxcr = 0x1F80; //Vol. 2A 3-520 ((struct FakeStack *)(((struct machine_context_t *)stack->context)->SP))->fcw = 0x037F; //Vol. 1 8-7 + +#elif defined( __ARM_ARCH ) + + struct FakeStack { + float fpRegs[16]; // floating point registers + void *intRegs[9]; // integer/pointer registers + void *arg[2]; // placeholder for this pointer + }; + + ((struct machine_context_t *)stack->context)->SP = (char *)stack->base - sizeof( struct FakeStack ); + ((struct machine_context_t *)stack->context)->FP = NULL; + + struct FakeStack *fs = (struct FakeStack *)((struct machine_context_t *)stack->context)->SP; + + fs->intRegs[8] = CtxInvokeStub; + fs->arg[0] = this; + fs->arg[1] = invoke; #else #error Only __i386__ and __x86_64__ is supported for threads in cfa Index: src/libcfa/concurrency/invoke.h =================================================================== --- src/libcfa/concurrency/invoke.h (revision 764b4b24dbc67225234679918ac1f34d96d5feed) +++ src/libcfa/concurrency/invoke.h (revision c916e12b46506cdadc4003fc6a5ad660791983d9) @@ -10,6 +10,6 @@ // Created On : Tue Jan 17 12:27:26 2016 // Last Modified By : Peter A. Buhr -// Last Modified On : Fri Jul 21 22:28:56 2017 -// Update Count : 1 +// Last Modified On : Tue Jan 23 14:55:46 2018 +// Update Count : 3 // @@ -203,4 +203,9 @@ "movl %%ebp,%1\n" \ : "=rm" (ctx.SP), "=rm" (ctx.FP) ) + #elif defined( __ARM_ARCH ) + #define CtxGet( ctx ) __asm__ ( \ + "mov %0,%%sp\n" \ + "mov %1,%%r11\n" \ + : "=rm" (ctx.SP), "=rm" (ctx.FP) ) #endif Index: src/libcfa/concurrency/kernel.c =================================================================== --- src/libcfa/concurrency/kernel.c (revision 764b4b24dbc67225234679918ac1f34d96d5feed) +++ src/libcfa/concurrency/kernel.c (revision c916e12b46506cdadc4003fc6a5ad660791983d9) @@ -10,10 +10,11 @@ // Created On : Tue Jan 17 12:27:26 2017 // Last Modified By : Peter A. Buhr -// Last Modified On : Fri Jul 21 22:33:18 2017 -// Update Count : 2 +// Last Modified On : Fri Dec 8 16:23:33 2017 +// Update Count : 3 // //C Includes #include +#define ftype `ftype` extern "C" { #include @@ -23,4 +24,5 @@ #include } +#undef ftype //CFA Includes Index: src/libcfa/concurrency/preemption.c =================================================================== --- src/libcfa/concurrency/preemption.c (revision 764b4b24dbc67225234679918ac1f34d96d5feed) +++ src/libcfa/concurrency/preemption.c (revision c916e12b46506cdadc4003fc6a5ad660791983d9) @@ -10,10 +10,11 @@ // Created On : Mon Jun 5 14:20:42 2017 // Last Modified By : Peter A. Buhr -// Last Modified On : Fri Jul 21 22:36:05 2017 -// Update Count : 2 +// Last Modified On : Tue Jan 23 17:59:30 2018 +// Update Count : 7 // #include "preemption.h" +#define ftype `ftype` extern "C" { #include @@ -26,5 +27,5 @@ #include } - +#undef ftype #ifdef __USE_STREAM__ @@ -60,8 +61,10 @@ // Machine specific register name -#ifdef __x86_64__ +#if defined(__x86_64__) #define CFA_REG_IP REG_RIP -#else +#elif defined(__i386__) #define CFA_REG_IP REG_EIP +#elif defined(__ARM_ARCH__) +#define CFA_REG_IP REG_R15 #endif @@ -296,7 +299,11 @@ // Receives SIGUSR1 signal and causes the current thread to yield void sigHandler_ctxSwitch( __CFA_SIGPARMS__ ) { +#if defined( __ARM_ARCH ) + __cfaabi_dbg_debug_do( last_interrupt = (void *)(cxt->uc_mcontext.arm_pc); ) +#else __cfaabi_dbg_debug_do( last_interrupt = (void *)(cxt->uc_mcontext.gregs[CFA_REG_IP]); ) - - // Check if it is safe to preempt here +#endif + + // Check if it is safe to preempt here if( !preemption_ready() ) { return; }