Index: doc/theses/thierry_delisle_PhD/thesis/fig/system.fig =================================================================== --- doc/theses/thierry_delisle_PhD/thesis/fig/system.fig (revision 1f201238257561a4db08fd69c2087b10464b4c6f) +++ doc/theses/thierry_delisle_PhD/thesis/fig/system.fig (revision 9b817e15315f591bd7b62c32698afa89cffdc598) @@ -49,4 +49,30 @@ 7800 3750 8025 3750 -6 +6 4125 4725 4950 4950 +1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4250 4838 100 100 4250 4838 4350 4838 +4 0 -1 0 0 0 12 0.0000 2 135 510 4425 4875 thread\001 +-6 +6 5175 4725 6300 4950 +2 2 0 1 -1 -1 0 0 -1 0.000 0 0 0 0 0 5 + 5400 4950 5400 4725 5175 4725 5175 4950 5400 4950 +4 0 -1 0 0 0 12 0.0000 2 135 765 5475 4875 processor\001 +-6 +6 6600 4725 7500 4950 +2 2 1 1 -1 -1 0 0 -1 3.000 0 0 0 0 0 5 + 6825 4950 6600 4950 6600 4725 6825 4725 6825 4950 +4 0 -1 0 0 0 12 0.0000 2 135 540 6900 4875 cluster\001 +-6 +6 2175 4725 3975 4950 +1 3 0 1 0 0 0 0 0 0.000 1 0.0000 2250 4830 30 30 2250 4830 2280 4830 +4 0 -1 0 0 0 12 0.0000 2 180 1605 2325 4875 generator/coroutine\001 +-6 +6 1575 2550 2775 3900 +2 2 0 1 -1 -1 0 0 -1 0.000 0 0 0 0 0 5 + 2400 3450 2400 3000 1950 3000 1950 3450 2400 3450 +4 1 -1 0 0 0 12 0.0000 2 135 1170 2175 2700 Discrete-event\001 +4 1 -1 0 0 0 12 0.0000 2 180 720 2175 2925 Manager\001 +4 1 -1 0 0 0 12 0.0000 2 180 930 2175 3675 preemption\001 +4 1 -1 0 0 0 12 0.0000 2 135 630 2175 3900 timeout\001 +-6 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 5550 2625 150 150 5550 2625 5700 2625 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 5550 3225 150 150 5550 3225 5700 3225 @@ -62,10 +88,6 @@ 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3975 2850 150 150 3975 2850 4125 2850 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 7200 2775 150 150 7200 2775 7350 2775 -1 3 0 1 0 0 0 0 0 0.000 1 0.0000 2250 4830 30 30 2250 4830 2280 4830 1 3 0 1 0 0 0 0 0 0.000 1 0.0000 7200 2775 30 30 7200 2775 7230 2805 1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 3525 3600 150 150 3525 3600 3675 3600 -1 3 0 1 -1 -1 0 0 -1 0.000 1 0.0000 4625 4838 100 100 4625 4838 4725 4838 -2 2 0 1 -1 -1 0 0 -1 0.000 0 0 0 0 0 5 - 2400 4200 2400 3750 1950 3750 1950 4200 2400 4200 2 2 1 1 -1 -1 0 0 -1 4.000 0 0 0 0 0 5 6300 4500 6300 1800 3000 1800 3000 4500 6300 4500 @@ -135,18 +157,7 @@ 1 1 1.00 45.00 90.00 7875 3750 7875 2325 7200 2325 7200 2550 -2 2 1 1 -1 -1 0 0 -1 3.000 0 0 0 0 0 5 - 6975 4950 6750 4950 6750 4725 6975 4725 6975 4950 -2 2 0 1 -1 -1 0 0 -1 0.000 0 0 0 0 0 5 - 5850 4950 5850 4725 5625 4725 5625 4950 5850 4950 -4 1 -1 0 0 0 10 0.0000 2 135 900 5550 4425 Processors\001 -4 1 -1 0 0 0 10 0.0000 2 165 1170 4200 3975 Ready Threads\001 -4 1 -1 0 0 0 10 0.0000 2 165 1440 7350 1725 Other Cluster(s)\001 -4 1 -1 0 0 0 10 0.0000 2 135 1080 4650 1725 User Cluster\001 -4 1 -1 0 0 0 10 0.0000 2 165 630 2175 3675 Manager\001 -4 1 -1 0 0 0 10 0.0000 2 135 1260 2175 3525 Discrete-event\001 -4 1 -1 0 0 0 10 0.0000 2 150 900 2175 4350 preemption\001 -4 0 -1 0 0 0 10 0.0000 2 135 630 7050 4875 cluster\001 -4 1 -1 0 0 0 10 0.0000 2 135 1350 4200 3225 Blocked Threads\001 -4 0 -1 0 0 0 10 0.0000 2 135 540 4800 4875 thread\001 -4 0 -1 0 0 0 10 0.0000 2 120 810 5925 4875 processor\001 -4 0 -1 0 0 0 10 0.0000 2 165 1710 2325 4875 generator/coroutine\001 +4 1 -1 0 0 0 12 0.0000 2 135 840 5550 4425 Processors\001 +4 1 -1 0 0 0 12 0.0000 2 180 1215 4200 3975 Ready Threads\001 +4 1 -1 0 0 0 12 0.0000 2 165 1275 7350 1725 Other Cluster(s)\001 +4 1 -1 0 0 0 12 0.0000 2 135 990 4650 1725 User Cluster\001 +4 1 -1 0 0 0 12 0.0000 2 135 1380 4200 3225 Blocked Threads\001