Index: doc/theses/thierry_delisle_PhD/thesis/text/conclusion.tex
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--- doc/theses/thierry_delisle_PhD/thesis/text/conclusion.tex	(revision 0fec6c16191867e177606d305a5c86998e83b934)
+++ doc/theses/thierry_delisle_PhD/thesis/text/conclusion.tex	(revision 83cb7545e874064f877d8b20848d09c001c487cd)
@@ -5,4 +5,5 @@
 Because I am the main developer for both components of this project, there is strong continuity across the design and implementation.
 This continuity provides a consistent approach to advanced control-flow and concurrency, with easier development, management and maintenance of the runtime in the future.
+
 I believed my Masters work would provide the background to make the Ph.D work reasonably straightforward.
 However, I discovered two significant challenges.
@@ -108,5 +109,5 @@
 As such, simply moving on without the result is likely to be acceptable.
 Another option is to read multiple memory addresses and only wait for \emph{one of} these reads to retire.
-This approach has a similar effect, where cache lines with more traffic are on less often.
+This approach has a similar effect, where cache lines with more traffic are waited on less often.
 In both of these examples, some care is needed to ensure that reads to an address \emph{sometime} retire.